7721 datasheet(361/577 Pages) RENESAS

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DMA CONTROLLER

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13.8 Link array chain transfer mode

7721 Group User’s Manual

13.8.1 Transfer parameter memory in link array chain transfer mode

The transfer parameters required for each transfer method are described below. These parameters can be

located in separate memory locations, in a unit of one block’s parameters. However, these parameters

must be located starting at an even address.

Figure 13.8.2 shows a transfer parameter memory map in the link array chain transfer mode.

(1)

In 2-bus cycle transfer

All of the following transfer parameters are required for each block of data; that is, a transfer

parameter memory consumes 16 bytes for each block.

• Transfer source’s transfer start address (24 bits) + Dummy data (8 bits)

• Transfer destination’s transfer start address (24 bits) + Dummy data (8 bits)

• Transfer data’s byte number (24 bits) + Dummy data (8 bits)

• Start address of next transfer parameter memory (24 bits) (Note) + Dummy data (8 bits)

(2)

In 1-bus cycle transfer from memory to I/O

All of the following transfer parameters are required for each block of data; that is, a transfer

parameter memory consumes 12 bytes for each block.

• Transfer source’s transfer start address (24 bits) + Dummy data (8 bits)

• Transfer data’s byte number (24 bits) + Dummy data (8 bits)

• Start address of next transfer parameter memory (24 bits) (Note) + Dummy data (8 bits)

(3)

In 1-bus cycle transfer from I/O to memory

All of the following transfer parameters are required for each block of data; that is, a transfer

parameter memory consumes 12 bytes for each block.

• Transfer destination’s transfer start address (24 bits) + Dummy data (8 bits)

• Transfer data’s byte number (24 bits) + Dummy data (8 bits)

• Start address of next transfer parameter memory (24 bits) (Note) + Dummy data (8 bits)

Note: For the last block of data, write “00000016” as the start address of the next transfer parameter

memory.

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