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7721 Datasheet(PDF) 105 Page - Renesas Technology Corp |
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7721 Datasheet(HTML) 105 Page - Renesas Technology Corp |
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105 / 577 page  7721 Group User’s Manual INTERRUPTS 7–8 b0 0 1 0 1 0 1 0 1 b2 0 0 0 0 1 1 1 1 Table 7.3.1 Setting of interrupt priority level b1 0 0 1 1 0 0 1 1 Level 0 (Interrupt disabled) Level 1 Level 2 Level 3 Level 4 Level 5 Level 6 Level 7 — Low High 7.3 Interrupt control Interrupt priority level Interrupt priority level select bits Priority IPL2 0 0 0 0 1 1 1 1 Enabled interrupt priority level Enable level 1 and above interrupts. Enable level 2 and above interrupts. Enable level 3 and above interrupts. Enable level 4 and above interrupts. Enable level 5 and above interrupts. Enable level 6 and level 7 interrupts. Enable only level 7 interrupt. Disable all maskable interrupts. IPL1 0 0 1 1 0 0 1 1 IPL0 0 1 0 1 0 1 0 1 Table 7.3.2 Interrupt enabled level corresponding to IPL contents IPL0: Bit 8 in processor status register (PS) IPL1: Bit 9 in processor status register (PS) IPL2: Bit 10 in processor status register (PS) |
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