7721 datasheet(192/577 Pages) RENESAS

192 / 577 page

TIMER B

7721 Group User’s Manual

9–25

9.5 Pulse period/Pulse width measurement mode

[Precautions for pulse period/pulse width measurement mode]

1. A timer Bj interrupt request is generated by the following sources:

q Input of measured pulse’s valid edge

q Counter overflow

When the overflow generates the interrupt request, the timer Bj overflow flag is set to “1.”

2. After reset, the timer Bj overflow flag is undefined. When a value is written to the timer Bj mode register

with the count start bit = “1,” this flag is cleared to “0” at the next count timing of the count source.

3. An undefined value is transferred to the reload register when the first valid edge is input after the counter

starts counting. In this case, no timer Bj interrupt request occurs.

4. The counter value at start of counting is undefined. Accordingly, a timer Bj interrupt request may be

generated by an overflow immediately after the counter starts counting.

5. If the contents of the measurement mode select bits are changed after the counter starts counting, the

timer Bj interrupt request bit is set to “1.” When the same value which has been set in these bits are

written again, the timer Bj interrupt request bit is not changed, that is, the bit retains the state.

6. If the input signal to the TBjIN pin is affected by noise, etc., the counter may not perform the exact

measurement. We recommend to verify, by software, that the measurement values are within a constant

range.

7721 Datasheet(PDF) 192 Page - Renesas Technology Corp