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7721 Datasheet(PDF) 256 Page - Renesas Technology Corp |
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7721 Datasheet(HTML) 256 Page - Renesas Technology Corp |
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256 / 577 page ![]() A-D CONVERTER 7721 Group User’s Manual 12–5 (2) Trigger select bit (bit 5) This bit is used to select the source of trigger occurrence. (Refer to section “(3) A-D conversion start bit.”) (3) A-D conversion start bit (bit 6) q When internal trigger is selected Setting this bit to “1” generates a trigger, causing the A-D converter to start operating. Clearing this bit to “0” causes the A-D converter to stop operating. In the one-shot mode or single sweep mode, this bit is cleared to “0” after the operation is completed. In the repeat mode or repeat sweep mode, the A-D converter continues operating until this bit is cleared to “0” by software. q When external trigger is selected ______ When the ADTRG pin level goes from “H” to “L” with this bit = “1,” a trigger occurs, causing the A-D converter to start operating. The A-D converter stops when this bit is cleared to “0.” In the one-shot mode or single sweep mode, this bit remains set to “1” even after the operation is completed. In the repeat mode or repeat sweep mode, the A-D converter continues operating until this bit is cleared to “0” by software. (4) A-D conversion frequency ( φAD) select bit (bit 7) As listed in Table 12.2.1, the conversion time of the A-D converter varies depending on the operating clock ( φAD) selected by this bit. Since the A-D converter’s comparator consists of capacity coupling amplifiers, keep that φAD ≥ 250 kHz during A-D conversion. 12.2 Block description Table 12.2.1 Conversion time per one analog input pin (unit: µs) 1 f2/2 28.5 14.25 9.12 0 f2/4 57.0 28.5 18.24 A-D conversion frequency ( φAD) select bit φAD Conversion time f(XIN) = 8 MHz f(XIN) = 16 MHz f(XIN) = 25 MHz |
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