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7721 Datasheet(PDF) 258 Page - Renesas Technology Corp |
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7721 Datasheet(HTML) 258 Page - Renesas Technology Corp |
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258 / 577 page  A-D CONVERTER 7721 Group User’s Manual 12–7 12.2.3 A-D register i (i = 0 to 7) Figure 12.2.4 shows the structure of the A-D register i. When the A-D conversion is completed, the conversion result (contents of the successive approximation register) is stored into this register. Each A- D register i corresponds to an analog input pin (ANi). 12.2 Block description Fig. 12.2.4 Structure of A-D register i A-D register 0 (Addresses 2016) A-D register 1 (Addresses 2216) A-D register 2 (Addresses 2416) A-D register 3 (Addresses 2616) A-D register 4 (Addresses 2816) A-D register 5 (Addresses 2A16) A-D register 6 (Addresses 2C16) A-D register 7 (Addresses 2E16) Bit 7 to 0 At reset Undefined RW Functions RO Reads an A-D conversion result. b7 b6 b5 b4 b3 b2 b1 b0 |
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