38C3 datasheet(124/224 Pages) RENESAS

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38C3 Group User’s Manual

APPLICATION

2-59

2.5 A-D converter

This paragraph describes the setting method of A-D converter relevant registers, notes etc.

2.5.1 Memory map

Fig. 2.5.1 Memory map of A-D converter relevant registers

2.5.2 Relevant registers

Fig. 2.5.2 Structure of A-D control register

A-D control register (ADCON)

A-D conversion register (low-order) (ADL)

003216

003316

Address

A-D conversion register (high-order) (ADH)

003416

Interrupt request register 2 (IREQ2)

003D16

Interrupt control register 2 (ICON2)

003F16

A-D control register

b7 b6 b5 b4 b3 b2 b1 b0

A-D control register

(ADCON: address 3216)

Name

Functions

At reset R W

Analog input pin

selection bits

b2 b1 b0

0 0 0: P60/AN0

0 0 1: P61/AN1

0 1 0: P62/AN2

0 1 1: P63/AN3

1 0 0: P64/AN4

1 0 1: P65/AN5

1 1 0: P66/AN6

1 1 1: P67/AN7

AD conversion

completion bit

0: Conversion in progress

1: Conversion completed

Nothing is arranged for these bits. These are

write disabled bits. When these bits are read

out, the contents are “0”.

Nothing is arranged for this bit. This is write

disabled bit. When this bit is read out, the

contents are “0”.

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