DSPB56725AF datasheet(22/48 Pages) FREESCALE

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Symphony™ DSP56724/ DSP56725 Multi-Core Audio Processors, Rev. 1

Freescale Semiconductor

1.2.3

Programming the SHI I2C Serial Clock

The programmed serial clock cycle, TI2CCP, is specified by the value of the HDM[7:0] and HRS bits of the HCKR (SHI clock

control register).

The expression for T I2CCP is

T I2CCP = [TC × 2 × (HDM[7:0] + 1) × (7 × (1 – HRS) + 1)]

Eqn. 1

where

— HRS is the prescaler rate select bit. When HRS is cleared, the fixed

divide-by-eight prescaler is operational. When HRS is set, the prescaler is bypassed.

— HDM[7:0] are the divider modulus select bits. A divide ratio from 1 to 256 (HDM[7:0] = $00 to $FF) may be

selected.

In I2C mode, the user may select a value for the programmed serial clock cycle from

× TC (if HDM[7:0] = $02 and HRS = 1)

Eqn. 2

4096

× TC (if HDM[7:0] = $FF and HRS = 0)

Eqn. 3

The programmed serial clock cycle (TI2CCP) should be chosen in order to achieve the desired SCL serial clock cycle (TSCL), as

shown in next.

TI2CCP + 3 × TC + 45ns + TR

(Nominal, SCL Serial Clock Cycle (TSCL) generated as master)

Eqn. 4

HREQ in assertion to first SCL edge

• Filters bypassed

• Very Narrow filters enabled

• Narrow filters enabled

• Wide filters enabled

TAS;RQI

4327

4317

4282

4227

—

927

917

877

827

—

First SCL edge to HREQ is not asserted

(HREQ in hold time.)

tHO;RQI

0.0

—

0.0

—

Note:

1. VCORE_VDD = 1.00± 0.05 V; TJ = –40° C to 100° C, CL = 50 pF

2. Pull-up resistor: R P (min) = 1.5 k

3. Capacitive load: C b (max) = 50 pF

5. All times assume noise free inputs

5. All times assume internal clock frequency of 200 MHz

6. SHI_1 specs match those of SHI

7. The numbers listed are based on the module/pad design and its characteristics during output. The module is compliant with

I2C standard, so the module should receive I2C bus compliant signal without any issue.

Table 10. SHI I2C Protocol Timing (Continued)

Standard I2C

No.

Characteristics1,2,3,4,5

Symbol/

Expression

Standard

Fast-Mode

Unit

Min

Max

Min

Max

DSPB56725AF Datasheet(PDF) 22 Page - Freescale Semiconductor, Inc

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