DSPB56725AF datasheet(37/48 Pages) FREESCALE

Part #	DSPB56725AF

Description	Symphony??DSP56724/DSP56725 Multi-Core Audio Processors

PDF	48 Pages

Scroll/Zoom	100%

Manufacturer	FREESCALE [Freescale Semiconductor, Inc]

Direct Link	http://www.freescale.com

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37 / 48 page

Symphony™ DSP56724/ DSP56725 Multi-Core Audio Processors, Rev. 1

Freescale Semiconductor

Figure 29 shows the EMC signals diagram, with EMC PLL bypassed.

Figure 29. EMC Signals (EMC PLL Bypassed; LRCC[CLKDIV] = 8)

Output setup from LCLK (except LAD[23:0] and LALE)

Tout_s

—

Output hold from LCLK (except LAD[23:0] and LALE)

Tout_h

—

LAD[23:0] output setup from LCLK

Tad_s

—

LAD[23:0] output hold from LCLK

Tad_h

—

LCLK to output high impedance for LAD[23:0]

Tad_z

—17.1

Note:

1. Negative hold time means the signal could be invalid before LCLK raising edge.

Table 18. EMC Timing Parameters (EMC PLL Bypassed; LRCC[CLKDIV] = 8)

Parameter

Symbol

Min

Max

Unit

Tin_s

Tin_h

LGTA

asynchronous input

LA[2:0]/LBCTL/LCS[7:0]

LOE/LWE

LCKE/LSDA10/LSDDQM

LGPL[5:0]

Output Signals

LCLK

LAD[23:0] (data)

Tclk

LUPWAIT

asynchronous input

Tgta

Tupwait

Tout_s

Tout_h

LALE

Tad_s

Tad_h

LAD[23:0]

Tad_z

LSDWE/LSDRAS/LSDCAS

Tale

Tale_h

DSPB56725AF Datasheet(PDF) 37 Page - Freescale Semiconductor, Inc

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