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ACS8525AP Datasheet(PDF) 58 Page - Semtech Corporation |
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ACS8525AP Datasheet(HTML) 58 Page - Semtech Corporation |
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58 / 112 page ![]() ACS8525A LC/P ADVANCED COMMS & SENSING FINAL DATASHEET Revision 1.00/September 2007 © Semtech Corp. Page 58 www.semtech.com Address (hex): 34 Register Name cnfg_input_mode Description (R/W) Register controlling various input modes of the device. Default Value 1100 1010* Bit 7Bit 6 Bit 5Bit 4 Bit 3 Bit 2Bit 1Bit 0 auto_extsync_ en phalarm_time- out XO_edge extsync_en ip_sonsdhb reversion_mode Bit No. Description Bit Value Value Description 7 auto_extsync_en Bit to automatically disable the external Frame Sync input following a source switch. 0 1 External Frame Sync enabled/disabled according to extsync_en. External Frame Sync enabled if extsync_en = 1 until a source switch. After this it is only re-enabled by writing “1” to extsync_en again. 6 phalarm_timeout Bit to enable the automatic timeout facility on phase alarms. When enabled, any source with a phase alarm set will have its phase alarm cancelled after 128 seconds. 0 1 Phase alarms on sources only cancelled by software. Phase alarms on sources automatically time out. 5 XO_edge If the 12.800 MHz oscillator module connected to REFCLK has one edge faster than the other, then for jitter performance reasons, the faster edge should be selected. This bit allows either the rising edge or the falling edge to be selected. 0 1 Device uses the rising edge of the external oscillator. Device uses the falling edge of the external oscillator. 4Not used. - - 3 extsync_en Bit to select whether or not DPLL1 will look for a reference Sync pulse on the SYNC1/2/3 input pins. Even though this bit may enable the external Sync reference, it may be disabled according to auto_extsync_en. 0 1 No External Frame Sync signal on selected Sync input- SYNC1/2/3 pins ignored. External Sync derived from selected Sync input- SYNC1/2/3 pin- according to auto_extsync_en. 2 ip_sonsdhb Bit to configure input frequencies to be either SONET or SDH derived. This applies only to selections of 0001 (bin) in the cnfg_ref_source_frequency registers when the input frequency is either 1544 kHz or 2048 kHz. *The default value of this bit is taken from the value of the SONSDHB pin at power-up. 0 1 SDH- inputs set to 0001 expected to be 2048 kHz. SONET- inputs set to 0001 expected to be 1544 kHz. 1Not used. - - 0 reversion_mode Bit to select Revertive/Non-revertive mode. When in Non-revertive mode, the device will not automatically switch to a higher priority source, unless the current source fails. When in Revertive mode the device will always select the highest priority source. 0 1 Non-revertive mode. Revertive mode. |
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