ACS8525AP datasheet(30/112 Pages) SEMTECH

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ACS8525A LC/P

ADVANCED COMMS & SENSING

FINAL

DATASHEET

Revision 1.00/September 2007 © Semtech Corp.

Page 30

www.semtech.com

Operating Modes (States) of the Device

The ACS8525A has three primary modes of operation, or

operating states: Free-Run, Locked and Digital Holdover.

These are supported by three secondary, temporary

modes (Pre-Locked, Lost-Phase and Pre-Locked2). Refer

to the State Transition Diagram for DPLL1, Figure 8.

The ACS8525A can operate in Forced or Automatic

control. On reset, the ACS8525A reverts to Automatic

Control, where transitions between states are controlled

completely automatically. Forced Control can be invoked

by configuration, allowing transitions to be performed

under external control. This is not the normal mode of

operation, but is provided for special occasions such as

testing, or where a high degree of hands-on control is

required.

Free-run Mode

The Free-run mode is typically used following a

power-on-reset or a device reset before network

synchronization has been achieved. In the Free-run mode,

the timing and synchronization signals generated from

the ACS8525A are based on the 12.800 MHz clock

frequency provided from the external oscillator and are

not synchronized to an input SEC. By default, the

frequency of the output clock is a fixed multiple of the

frequency of the external oscillator, and the accuracy of

the output clock is equal to the accuracy of the oscillator.

However the external oscillator frequency can be

calibrated to improve its accuracy by a software

calibration routine using register

cnfg_nominal_frequency (Reg. 3C and 3D). For example a

500 ppm offset crystal could be made to look like one

accurate to 0.02 ppm.

The transition from Free-run to Pre-locked occurs when

the ACS8525A selects an SEC.

Pre-locked Mode

The ACS8525A will enter the Locked state in a maximum

of 100 seconds, as defined by GR-1244-CORE[13]

specification, if the selected SEC is of good quality. If the

device cannot achieve lock within 100 seconds, it reverts

to Free-Run mode and another SEC is selected.

Locked Mode

The Locked mode is entered from Pre-locked, Pre-locked2

or Phase-lost mode when an input reference source has

been selected and the DPLL has locked. The DPLL is

considered to be locked when the phase loss/lock

detectors (See“Phase Lock/Loss Detectors” on page 19)

indicate that the DPLL has remained in phase lock

continuously for at least one second. When the

ACS8525A is in Locked mode, the output frequency and

phase tracks that of the selected input reference source.

Lost-phase Mode

Lost-phase mode is used whenever the phase loss/lock

detectors (See“Phase Lock/Loss Detectors” on page 19)

indicate that the DPLL has lost phase lock. The DPLL will

still be trying to lock to the input clock reference, if it

exists. If the Leaky Bucket Accumulator calculates that

the anomaly is serious, the device disqualifies the

reference source. If the device spends more than 100

seconds in Lost-phase mode, the reference is disqualified

and a phase alarm is raised on it. If the reference is

disqualified, one of the following transitions takes place:

1. Go to Pre-locked2;

- If a known good stand-by source is available.

2. Go to Holdover;

- If no stand-by sources are available.

Digital Holdover Mode

Digital Holdover mode is the operating condition the

device enters when its currently selected input source

becomes invalid, and no other valid replacement source

is available.

In Digital Holdover mode, the ACS8525A provides the

timing signals to maintain the Line Card but is not phase

locked to an input SEC.

Digital Holdover operates Instantaneously, which means

the DPLL freezes at the frequency it was operating at the

time of entering Digital Holdover mode. This determines

the output frequency accuracy.

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