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ACS8525AP Datasheet(PDF) 59 Page - Semtech Corporation |
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ACS8525AP Datasheet(HTML) 59 Page - Semtech Corporation |
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59 / 112 page ![]() ACS8525A LC/P ADVANCED COMMS & SENSING FINAL DATASHEET Revision 1.00/September 2007 © Semtech Corp. Page 59 www.semtech.com Address (hex): 35 Register Name cnfg_DPLL2_path Description (R/W) Register to configure the feedback mode of DPLL2. Default Value 1010 0000 Bit 7Bit 6 Bit 5Bit 4 Bit 3 Bit 2Bit 1Bit 0 DPLL2_dig_ feedback Bit No. Description Bit Value Value Description 7Not used. - - 6 DPLL2_dig_feedback Bit to select digital feedback mode for DPLL2. 0 1 DPLL2 in analog feedback mode. DPLL2 in digital feedback mode. [5:0] Not used. - - Address (hex): 36 Register Name cnfg_differential_inputs Description (R/W) Configures the differential inputs to be PECL or LVDS type inputs. Default Value 0000 0011 Bit 7Bit 6 Bit 5Bit 4 Bit 3 Bit 2Bit 1Bit 0 SEC2_DIFF_ PECL SEC1_DIFF_ PECL Bit No. Description Bit Value Value Description [7:2] Not used. - - 1 SEC2_DIFF_PECL Configures the SEC2 DIFF input to be compatible with either 3 V LVDS or 3 V PECL electrical levels. 0 1 SEC2 DIFF input LVDS compatible. SEC2 DIFF input PECL compatible (Default). 0 SEC1_DIFF_PECL Configures the SEC1 DIFF input to be compatible with either 3 V LVDS or 3 V PECL electrical levels. 0 1 SEC1 DIFF input LVDS compatible. SEC1 DIFF input PECL compatible (Default). |
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