ACS8525AP datasheet(89/112 Pages) SEMTECH

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ACS8525A LC/P

ADVANCED COMMS & SENSING

FINAL

DATASHEET

Revision 1.00/September 2007 © Semtech Corp.

Page 89

www.semtech.com

narrow_en (test control bit)

Set to 1 (default value).

1Set to 1.

[4:3]

Not used.

[2:0]

phase_loss_fine_limit

When enabled by Bit 7, this register coarsely sets

the phase limit at which the device indicates phase

lost or locked. The default value of 2 (010) gives a

window size of around ±90 - 180º. The phase

position of the inputs to the DPLL has to be within

the window limit for 1 – 2 seconds before the device

indicates phase lock. If it is outside the window for

any time then phase loss is immediately indicated.

For most cases the default value of 2 (010) is

satisfactory. The window size changes in proportion

to the value, so a value of 1 (001) will give a narrow

phase acceptance or lock window of approximately

±45 - 90º.

000

001

010

011

100

101

110

111

Do not use. Indicates phase loss continuously.

Small phase window for phase lock indication.

Recommended value.

)

) Larger phase window for phase lock indication.

)

Address (hex):

Description

(R/W) Register to configure some

of the parameters of DPLL phase

detectors.

Default Value

1000 0101

Bit 7Bit 6

Bit 5Bit 4

Bit 3

Bit 2Bit 1Bit 0

coarse_lim_

phaseloss_en

wide_range_en multi_ph_resp

phase_loss_coarse_limit

Bit No.

Description

Bit Value

Value Description

coarse_lim_phaseloss_en

whose range is determined by

phase_loss_coarse_limit Bits [3:0]. This register

sets the limit in the number of input clock cycles (UI)

that the input phase can move by before the DPLL

indicates phase lost.

Phase loss not triggered by the coarse phase lock

detector.

Phase loss triggered when phase error exceeds the

limit programmed in phase_loss_coarse_limit,

Bits [3:0].

Address (hex):

73 (cont...)

Description

(R/W) Register to configure some

of the parameters of the DPLL

phase detectors.

Default Value

1010 0010

Bit 7Bit 6

Bit 5Bit 4

Bit 3

Bit 2Bit 1Bit 0

fine_limit_en

noact_ph_loss

narrow_en

phase_loss_fine_limit

Bit No.

Description

Bit Value

Value Description

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