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PCI1221 Datasheet(PDF) 108 Page - Texas Instruments

Part # PCI1221
Description  PC CARD CONTROLLERS
PDF  123 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

PCI1221 Datasheet(HTML) 108 Page - Texas Instruments

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108
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
socket force event register
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Name
Socket force event
Type
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Socket force event
Type
R
W
W
W
W
W
W
W
W
R
W
W
W
W
W
W
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Register:
Socket force event
Type:
Read only, write only (see individual bit descriptions)
Offset:
CardBus socket address + 0Ch
Default:
0000 0000h
Description: The socket force event register is used to force changes to the socket event register and the
socket present state register. The CVSTEST bit in this register must be written when forcing
changes that require card interrogation. See Table 56 for a complete description of the
register contents.
Table 56. Socket Force Event Register
BIT
SIGNAL
TYPE
FUNCTION
31-15
RSVD
R
Reserved. Bits 31-15 are read only and return 0s when read.
14
CVSTEST
W
Card VS test. When bit 14 is set, the PCI1221 re–interrogates the PC Card, updates the socket present
state register, and enables the socket power control.
13
FYVCARD
W
Force YV card. Write transactions to bit 13 cause the YVCARD bit in the socket present state register
to be written. When set, this bit disables the socket power control.
12
FXVCARD
W
Force XV card. Write transactions to bit 12 cause the XVCARD bit in the socket present state register
to be written. When set, this bit disables the socket power control.
11
F3VCARD
W
Force 3-V card. Write transactions to bit 11 cause the 3VCARD bit in the socket present state register
to be written. When set, this bit disables the socket power control.
10
F5VCARD
W
Force 5-V card. Write transactions to bit 10 cause the 5VCARD bit in the socket present state register
to be written. When set, this bit disables the socket power control.
9
FBADVCCREQ
W
Force bad VCC request. Changes to the BADVCCREQ bit in the socket present state register can be
made by writing to bit 9.
8
FDATALOST
W
Force data lost. Write transactions to bit 8 cause the DATALOST bit in the socket present state register
to be written.
7
FNOTACARD
W
Force not a card. Write transactions to bit 7 cause the NOTACARD bit in the socket present state
register to be written.
6
RSVD
R
Reserved. Bit 6 is read only and returns 0 when read.
5
FCBCARD
W
Force CardBus card. Write transactions to bit 5 cause the CBCARD bit in the socket present state
register to be written.
4
F16BITCARD
W
Force 16-bit card. Write transactions to bit 4 cause the 16BITCARD bit in the socket present state
register to be written.
3
FPWRCYCLE
W
Force power cycle. Write transactions to bit 3 cause the PWREVENT bit in the socket event register
to be written, and the PWRCYCLE bit in the socket present state register is unaffected.
2
FCDETECT2
W
Force CCD2. Write transactions to bit 2 cause the CD2EVENT bit in the socket event register to be
written, and the CDETECT2 bit in the socket present state register is unaffected.
1
FCDETECT1
W
Force CCD1. Write transactions to bit 1 cause the CD1EVENT bit in the socket event register to be
written, and the CDETECT1 bit in the socket present state register is unaffected.
0
FCARDSTS
W
Force CSTSCHG. Write transactions to bit 0 cause the CSTSEVENT bit in the socket event register
to be written, and the CARDSTS bit in the socket present state register is unaffected.



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