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XIO2001 Datasheet(PDF) 124 Page - Texas Instruments

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Part # XIO2001
Description  Express??to PCI Bus Translation Bridge
PDF  131 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

XIO2001 Datasheet(HTML) 124 Page - Texas Instruments

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7.9
PCI Bus Timing Requirements
(1)
7.10
ZGU Thermal Characteristics
(1)
XIO2001 PCI Express™ to PCI Bus Translation Bridge
SCPS212B – MAY 2009 – REVISED JULY 2009
www.ti.com
over recommended operating conditions
33 MHz
66 MHz
PARAMETER
TEST CONDITION
UNIT
MIN
MAX
MIN
MAX
CL = 50 pF
11
CLK to shared signal valid propagation delay time
CL = 30 pF
6
tpd
ns
CL = 50 pF
2
CLK to shared signal invalid propagation delay time
CL = 30 pF
1
CL = 50 pF
2
tEnable time, high-impedance-to-active delay time
tON
ns
from CLK
CL = 30 pF
1
CL = 50 pF
28
Disable time, active-to-high-impedance delay time
tOFF
ns
from CLK
CL = 30 pF
14
Setup time on shared signals before CLK valid
tsu
7
3
ns
(rising edge)
Hold time on shared signals after CLK valid (rising
th
0
0
ns
edge)
(1)
The PCI shared signals are AD31:0, C/BE[3:0], FRAME, TRDY, IRDY, STOP, IDSEL, DEVSEL, LOCK, SERIRQ, PAR, PERR, SERR,
and CLKRUN.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
θ
JA
Low-K JEDEC test board, 1s (single signal layer), no air
85
flow
Junction-to-free-air thermal
°C/W
resistance
High-K JEDEC test board, 2s2p (double signal layer,
48.3
double buried power plane), no air flow
θ
JC
Junction-to-case thermal resistance
Cu cold plate measurement process
8.5
°C/W
θ
JB
Junction-to-board thermal
EIA/JESD 51-8
25.4
°C/W
resistance
ψ
JT
Junction-to-top of package
EIA/JESD 51-2
0.5
°C/W
ψ
JB
Junction-to-board
EIA/JESD 51-6
24
°C/W
TA
XIO2001ZGU
0
70
Operating ambient temperature
°C
range
XIO2001IZGU
–40
85
TJ
XIO2001ZGU
0
105
Virtual junction temperature
°C
XIO2001IZGU
–40
105
(1)
For more details, refer to TI application note IC Package Thermal Metrics (SPRA953).
Electrical Characteristics
124
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