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ST7565P Datasheet(PDF) 21 Page - Sitronix Technology Co., Ltd. |
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ST7565P Datasheet(HTML) 21 Page - Sitronix Technology Co., Ltd. |
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21 / 71 page ![]() ST7565P Ver 2.1b 21/71 2009/09/14 Pin Name I/O Function No. of Pins CLS I Selection pin to enable or disable the internal display clock oscillator circuit. CLS = “H” : use internal oscillator circuit . CLS = “L” : use external clock input (internal oscillator is disabled). When CLS = “L”, input the external display clock through the CL terminal. 1 M/S I This terminal selects the master/slave operation for the ST7565P Series chips. Master operation outputs the timing signals that are required for the LCD display, while slave operation input the timing signals required for the liquid crystal display. That synchronized the liquid crystal display system between Master and Slave. M/S = “H” Master operation M/S = “L” Slave operation M/S CLS Oscillator Circuit Power Supply Circuit CL FR DOF “H” “H” “L” Enabled Disabled Enabled Enabled Output Input Output Output Output Output “L” “H” “L” Disabled Disabled Disabled Disabled Input Input Input Input Input Input 1 CL I/O This is the display clock input terminal The following is true depending on the M/S and CLS status. M/S CLS CL “H” “H” “L” Output Input “L” “H” “L” Input Input 1 FR O This is the liquid crystal alternating current signal terminal. 1 /DOF O This is the LCD blanking control terminal. 1 FRS O Reserved 1 IRS I This terminal selects the resistors for the V0 voltage level adjustment. IRS = “H”: Use the internal resistors IRS = “L”: Do not use the internal resistors. The V0 voltage level is regulated by an external resistive voltage divider attached to the VR terminal 1 /HPM I This is the power control terminal for the power supply circuit for liquid crystal drive. /HPM = “H”: Normal mode /HPM = “L”: High power mode 1 SEL3 SEL2 SEL1 I These pins are DUTY selection. SEL 3 , 2 , 1 DUTY BIAS 0 , 0 , 0 1/65 1/9 or 1/7 0 , 0 , 1 1/49 1/8 or 1/6 0 , 1 , 0 1/33 1/6 or 1/5 0 , 1 , 1 1/55 1/8 or 1/6 1 , 0 , 0 1/53 1/8 or 1/6 1, X , X ----- ----- 3 TEST0 ~ 5 I These are terminals for IC testing. They are set to open. 6 |
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