SC28L92 datasheet(36/73 Pages) NXP

36 / 73 page

SC28L92_7

Product data sheet

Rev. 07 — 19 December 2007

36 of 73

NXP Semiconductors

SC28L92

3.3 V/5.0 V Dual Universal Asynchronous Receiver/Transmitter

7.3.3.2

Command Register channel B (CRB)

CRB is a register used to supply commands to channel B. Multiple commands can be

speciﬁed in a single write to CRB as long as the commands are non-conﬂicting, e.g., the

enable transmitter and reset transmitter commands cannot be speciﬁed in a single

command word.

The bit deﬁnitions for this register are identical to the bit deﬁnitions for CRA, with the

exception of miscellaneous commands 0xE and 0xF which are used for Power-down

mode. These two commands are not used in CRB. All other control actions that apply to

CRA also apply to CRB.

0110

Start break. Forces the TxDA output LOW (spacing). If the transmitter is empty the

start of the break condition will be delayed up to two bit times. If the transmitter is

active the break begins when transmission of the character is completed. If a

character is in the Tx FIFO, the start of the break will be delayed until that

character, or any other loaded subsequently are transmitted. The transmitter must

be enabled for this command to be accepted.

0111

Stop break. The TxDA line will go HIGH (marking) within two bit times. TxDA will

remain HIGH for one bit time before the next character, if any, is transmitted.

1000

Assert RTSN. Causes the RTSN output to be asserted (LOW).

1001

Negate RTSN. Causes the RTSN output to be negated (HIGH).

1010

Set time-out mode on. The receiver in this channel will restart the C/T as each

receive character is transferred from the shift register to the Rx FIFO. The C/T is

placed in the counter mode, the start counter or stop counter commands are

disabled, the counter is stopped, and the counter ready bit, ISR[3], is reset. (see

also watchdog timer description in the receiver Section 6.3.7.)

1011

Set MR pointer to 0x0.

1100

Disable time-out mode. This command returns control of the C/T to the regular start

counter or stop counter commands. It does not stop the counter, or clear any

pending interrupts. After disabling the time-out mode, a stop counter command

should be issued to force a reset of the ISR[3] bit.

1101

Not used.

1110

Power-down mode on. In this mode, the DUART oscillator is stopped and all

functions requiring this clock are suspended. The execution of commands other

than disable Power-down mode (1111) requires a X1/CLK. While in the

Power-down mode, do not issue any commands to the CR except the disable

Power-down mode command. The contents of all registers will be saved while in

this mode. It is recommended that the transmitter and receiver be disabled prior to

placing the DUART into Power-down mode. This command is in CRA only.

1111

Disable Power-down mode. This command restarts the oscillator. After invoking this

command, wait for the oscillator to start up before writing further commands to the

CR. This command is in CRA only. For maximum power reduction input pins should

be at VSS or VDD.

Table 40.

Miscellaneous commands …continued

Command

Description

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