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SC28L92 Datasheet(PDF) 53 Page - NXP Semiconductors

Part # SC28L92
Description  3.3 V/5.0 V Dual Universal Asynchronous Receiver/Transmitter (DUART)
PDF  73 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

SC28L92 Datasheet(HTML) 53 Page - NXP Semiconductors

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SC28L92_7
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 07 — 19 December 2007
53 of 73
NXP Semiconductors
SC28L92
3.3 V/5.0 V Dual Universal Asynchronous Receiver/Transmitter
[1]
The following conditions apply:
a) Parameters are valid over specified temperature and voltage range.
b) All voltage measurements are referenced to ground. For testing, all inputs swing between 0.4 V and 3.0 V with a transition time of
5 ns maximum. For X1/CLK this swing is between 0.4 V and 0.8VCC. All time measurements are referenced at input voltages of 0.8 V
and 2.0 V, and output voltages of 0.8 V and 2.0 V, as appropriate.
c) Typical values are at 25
°C, typical supply voltages, and typical processing parameters.
[2]
Test conditions for outputs: CL = 125 pF, except interrupt outputs. Test conditions for interrupt outputs: CL = 125 pF,
constant current source = 2.6 mA.
[3]
Input port pins have active pull-up transistors that will source a typical 2
µA from V
CC when they are at VSS. Input port pins at VCC source
0.0
µA.
[4]
All outputs are disconnected. Inputs are switching between CMOS levels of VCC − 0.2 V and VSS + 0.2 V.
Table 66.
Static characteristics, 3.3 V operation[1]
VCC = 3.3 V ± 10 %; Tamb = −40 °Cto+85 °C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL
input LOW voltage
-
0.65
0.2VCC V
VIH
input HIGH voltage
0.8VCC
1.7
-
V
VOL
output LOW voltage
IOL = 2.4 mA
-
0.2
0.4
V
VOH
output HIGH voltage
except open-drain outputs;
IOH = −400 µA
[2] VCC − 0.5 VCC − 0.2 -
V
II(1XPD)
Power-down mode input
current on pin X1/CLK
VI = 0 V to VCC
−0.5
+0.05
+0.5
µA
IIL(X1)
operating input LOW current
on pin X1/CLK
VI =0V
−80
-
0
µA
IIH(X1)
operating input HIGH current
on pin X1/CLK
VI =VCC
0-
80
µA
II
input leakage current
VI = 0 V to VCC
all except input port pins
[3]
−0.5
+0.05
+0.5
µA
input port pins
[3]
−8
+0.5
+0.5
µA
IOZH
output off current HIGH,
3-state data bus
VI =VCC
-
-
0.5
µA
IOZL
output off current LOW, 3-state
data bus
VI =0V
−0.5
-
-
µA
IODL
open-drain output LOW current
in off state
VI =0V
−0.5
-
-
µA
IODH
open-drain output HIGH
current in off state
VI =VCC
-
-
0.5
µA
ICC
power supply current
CMOS input levels
[4]
operating mode
-
-
5
mA
Power-down mode
-
≤1
5.0
µA



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