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SC28L92 Datasheet(PDF) 64 Page - NXP Semiconductors |
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SC28L92 Datasheet(HTML) 64 Page - NXP Semiconductors |
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64 / 73 page  SC28L92_7 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 07 — 19 December 2007 64 of 73 NXP Semiconductors SC28L92 3.3 V/5.0 V Dual Universal Asynchronous Receiver/Transmitter 12. Test information Fig 22. Wake-up mode timing status data ADD#2 status data TxD ADD#1 MR1[4:3] = 11 MR1[2] = 1 1 bit 9 D0 0 bit 9 ADD#2 1 ADD#1 MR1[2] = 0 D0 MR1[2] = 1 ADD#2 ADD#1 1 D0 0 ADD#2 1 bit 9 0 0 bit 9 MR1[4:3] = 11 D0 001aae319 RDN/WRN ADD#1 RxRDY (SR) receiver enabled peripheral station: bit 9 bit 9 bit 9 RxD WRN TxRDY (SR) transmitter enabled bit 9 master station: Fig 23. Test conditions on outputs 001aae320 INTRN DACKN 125 pF +5 V I = 2.4 mA D0 to D7 TxDA/TxDB OP0 to OP7 125 pF I = 2.4 mA VOL return to VCC for a 0 level I = 400 µA VOH return to VSS for a 1 level |
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