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6402 Datasheet(PDF) 121 Page - Intel Corporation |
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6402 Datasheet(HTML) 121 Page - Intel Corporation |
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121 / 250 page ![]() Intel® 6400/6402 Advanced Memory Buffer Datasheet 121 DDR MemBIST 11.3.2.4.4 XZY Addressing In XZY (range) address sequencing the MSB-to-LSB ordering of the address counters is Row, Bank, Column, although this is not the order of the fields in the registers used for address specification for MemBIST. As a result of this ordering of the counters, first the columns in one row in the starting bank will be accessed, followed by those on the same row in the second bank, and so on until that row in all banks has been accessed. Then the columns in the next row in the first bank will be selected and the process continued. Figure 11-4. Fast XY Address Sequencing Examples S 1 --- --- --- --- 2 --- --- --- --- 3 --- --- --- --- E 4 S 1 17 13 9 6 2 18 14 11 7 3 19 16 12 8 4 5 10 15 E 20 S 1 --- 3 --- --- 2 --- E 4 Y (Columns) 0 4 8 C Y (Columns) 0 4 8 C 10 Y (Columns) 0 4 8 C X (Rows) 0 1 2 3 X (Rows) 0 1 2 3 X (Rows) 0 1 Numbers inside of cells indicate order of access. --- inside a cell indicates that cell is not accessed. 0001 Fast XY Examples BL = 4, incrementing addresses |
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