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6402 Datasheet(PDF) 197 Page - Intel Corporation |
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6402 Datasheet(HTML) 197 Page - Intel Corporation |
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197 / 250 page ![]() Intel® 6400/6402 Advanced Memory Buffer Datasheet 197 Registers 14.5.2.6 MBLFSRSED: Memory Test Circular Shift and LFSR Seed 14.5.2.7 MBFADDRPTR: Memory Test failure Address Pointer Register 14.5.2.8 MB_ERR_DATA00: Memory Test Error Data 0 Bytes [3:0] Stores the first 32 bits of the 1st 144 bit failure data Research: compare all register[definitions to table.] 14.5.2.9 MB_ERR_DATA01: Memory Test Error Data 0 Bytes [7:4] Stores the second 32 bits of the 1st 144 bit failure data. Device: NodeID Function: 3 Offset: A4h Bit Attr Default Description 31:0 RWST 0000h DMBLFSRSED:MemBIST LFSR Seed This 32 bit register will be used as the initial data seed for LFSR or Circular shift data pattern. Device: NodeID Function: 3 Offset: A8h Bit Attr Default Description 31:0 RWST 0000h DMBFADDRPTR: This 32 bit register designates which MemBIST failures to log in the available failure address locations. The default value of this register is zero. It means MemBIST always logs beginning with the first failure. If it is programmed to hex A (10 in decimal), MemBIST will log failures starting from the11th failure. The corresponding MB_ERR_DATA0 register will log corrupted data in the first designated failure address. Note: this register does not affect the MBDATA failure bit location accumulators. Device: NodeID Function: 3 Offset: B0h Bit Attr Default Description 31:0 RWST 0000h DATA: Early failure data [31:0] Device: NodeID Function: 3 Offset: B4h Bit Attr Default Description 31:0 RWST 0000h DATA: Early failure data [63:32] |
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