6402 datasheet(194/250 Pages) INTEL

194 / 250 page

Registers

194

Intel® 6400/6402 Advanced Memory Buffer Datasheet

14.5.2.3

MBDATA[9:0]: Memory Test Data

Device:

NodeID

Function: 3

Offset:

44h

Bit

Attr

Default

Description

31:16

RWST

0000h

ROW: Row Address 15:0

RWST

SPARE:

14:3

RWST

0000h

COL: Column Address

BL8[14:3] <==> DRAM Column Address 15:11,9:3

BL4[14:3] <==> DRAM Column Address 14:11,9:2

2:0

RWST

000

BA: Bank Address 2:0

Device:

NodeID

Function: 3

Offset:

6Ch, 68h, 64h, 60h,5Ch, 58h, 54h, 50h,4Ch, 48h

Bit

Attr

Default

Description

31:0

RWST

0000h

DATA: see functional description below for definition by mode and register

Reg

Bit

Offset

Description by mode

(note: MBCSR.dtype, MBCSR.mbdata and MBCSR.enable288 select mode)

Fixed Data

Pattern

144 bit User

Defined Pattern

Circular Shift

LFSR

288 bit User

defined pattern

MBDATA9 31:0

6Ch

5th Fail address

User defined Late

data [71:64] &

Early data [71:64]

Word4 Circular

shift data

LFSR random Late

data [71:64] &

Early data [71:64]

User defined Late

data [71:64] (2nd

burst data) &

Early data [71:64]

(2nd burst data)

MBDATA8 31:0

68h

Late data [71:64]

& Early data

[71:64] Failure bit

location

accumulator

5th Fail address

Late data [71:64]

& Early data

[71:64] Failure bit

location

accumulator

5th Fail address

Late data [71:64]

& Early data

[71:64] Failure bit

location

accumulator

5th Fail address

Late data [71:64]

& Early data

[71:64] Failure bit

location

accumulator

User defined Late

data [71:64] (1st

burst data) &

Early data [71:64]

(1st burst data)

MBDATA7 31:0

64h

Fail address 4

User defined Late

data [63:32]

DW3 Circular shift

data

LFSR random Late

data [63:32]

User defined Late

data [63:32]

(2nd burst data)

MBDATA6 31:0

60h

Fail address 3

User defined Late

data [31:0]

DW2 Circular shift

data

LFSR random Late

data [31:0]

User defined Late

data [31:0]

(2nd burst data)

MBDATA5 31:0

5Ch

Fail address 2

User defined Early

data [63:32]

DW1 Circular shift

data

LFSR random

Early data [63:32]

User defined Early

data [63:32]

(2nd burst data)

MBDATA4 31:0

58h

Fail address 1

User defined Early

data [31:0]

DW0 Circular shift

data

LFSR random

Early data [31:0]

User defined Early

data [31:0]

(2nd burst data)

MBDATA3 31:0

54h

Late data [63:32]

Failure bit location

accumulator

Fail address 4

Late data [63:32]

Failure bit location

accumulator

Fail address 4

Late data [63:32]

Failure bit location

accumulator

Fail address 4

Late data [63:32]

Failure bit location

accumulator

User defined Late

data [63:32]

(1st burst data)

6402 Datasheet(PDF) 194 Page - Intel Corporation

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