SC28L201 datasheet(93/110 Pages) NXP

93 / 110 page

9397 750 13138

Product data sheet

Rev. 01 — 31 October 2005

93 of 110

Philips Semiconductors

SC28L201

3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO

12. Dynamic characteristics

Table 82:

Dynamic characteristics

Tamb = −40 °C to +85 °C; voltage tolerance ± 10 %; unless otherwise speciﬁed. [1]

Symbol

Parameter

Conditions

VDD = 3.3 V

VDD =5V

Unit

Min

Max

Min

Max

Reset timing (see Figure 6 and Figure 7)

tw(RESET)

pulse width on pin RESET

100

Bus timing [2] (see Figure 8)

tsu(An-RWL)

An to RDN and WRN LOW

setup time

10-10-

th(RWL-An)

RDN and WRN LOW to An hold

time

10-10-

tsu(RWL-CEN)

CEN to RDN and WRN LOW

setup time

0-0-

th(RWH-CEN)

RDN and WRN HIGH to CEN

hold time

0-0-

tw(RWL)

RDN and WRN LOW pulse

width

40-30-

tDv(RL)

RDN LOW to data valid time

85 pF load

125 pF load

td(RL-D)(act)

RDN LOW to data bus active

delay time

[3]

0-0-

td(D)(ﬂoat)

RDN or CEN HIGH to data bus

ﬂoating delay time

td(RH,CENH-DX)

RDN or CEN HIGH to data bus

invalid delay time

[4]

-0-

tsu(D)

data bus to WRN or CEN HIGH

setup time

write cycle

th(D)

data hold time after WRN HIGH

0-0-

td(RWD)

read and write cycle HIGH time

[2] [4]

10-10-

Port timing [2] (see Figure 12)

tsu(port)

port to RDN LOW setup time

read IP ports cycle

0-0-

th(port)

RDN HIGH to input port hold

time

0-0-

tv(port)

WRN or CEN HIGH to output

port valid time

OPR write cycle

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