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SC28L201 Datasheet(PDF) 100 Page - NXP Semiconductors |
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SC28L201 Datasheet(HTML) 100 Page - NXP Semiconductors |
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100 / 110 page  9397 750 13138 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 01 — 31 October 2005 100 of 110 Philips Semiconductors SC28L201 3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO a. Input pins b. Output pins Fig 12. Port timing (1) IRQN or OP3 to OP7 when used as interrupt outputs. (2) The test for open-drain outputs is intended to guarantee switching of the output transistor. Measurement of this response is referenced from the midpoint of the switching signal, VM,toa point 0.2 V above VOL. This point represents noise margin that assures true switching has occurred. Beyond this level, the effects of external circuitry and test environment are pronounced and can greatly affect the resultant measurement. Fig 13. Interrupt timing (80xxx mode) tsu(port) th(port) RDN IP0 to IP6 002aab490 WRN OP0 to OP6 old data new data tv(port) 002aab479 WRN RDN VM interrupt output(1) VOL + 0.2 V VOL td(int) VM VOL + 0.2 V VOL interrupt output(1) 002aab480 td(int) |
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