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RM48L930 Datasheet(PDF) 17 Page - Texas Instruments

Part # RM48L930
Description  RM48Lx30 16/32-Bit RISC Flash Microcontroller
PDF  147 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

RM48L930 Datasheet(HTML) 17 Page - Texas Instruments

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RM48L930
RM48L730
RM48L530
www.ti.com
SPNS176
– SEPTEMBER 2011
Table 2-12. PGE Multi-Buffered Serial Peripheral Interface Modules (MibSPI) (continued)
Terminal
Signal
Default
Pull Type
Description
Type
Pull State
Signal Name
144
PGE
MIBSPI3CLK
53
I/O
Pull Up
Programmable,
MibSPI3 clock, or GIO
20uA
MIBSPI3NCS[0]/AD2EVT/GIOB[2]
55
MibSPI3 chip select, or
GIO
MIBSPI3NCS[1]/N2HET1[25]/MDCLK
37
MIBSPI3NCS[2]/I2C_SDA/N2HET1[27]
4
MIBSPI3NCS[3]/I2C_SCL/N2HET1[29]
3
N2HET1[11]/MIBSPI3NCS[4]/N2HET2[18]
6
Pull Up
Programmable,
MibSPI3 chip select, or
20uA
GIO
MIBSPI3NENA /MIBSPI3NCS[5]/N2HET1[31]
54
Pull Up
Programmable,
MibSPI3 chip select, or
20uA
GIO
MIBSPI3NENA/MIBSPI3NCS[5]/N2HET1[31]
54
MibSPI3 enable, or GIO
MIBSPI3SIMO
52
MibSPI3 slave-in
master-out, or GIO
MIBSPI3SOMI
51
MibSPI3 slave-out
master-in, or GIO
MIBSPI5CLK
100
I/O
Pull Up
Programmable,
MibSPI5 clock, or GIO
20uA
MIBSPI5NCS[0]
32
MibSPI5 chip select, or
GIO
MIBSPI5NENA
97
MibSPI5 enable, or GIO
MIBSPI5SIMO[0]
99
MibSPI5 slave-in
master-out, or GIO
MIBSPI5SOMI[0]
98
MibSPI5 slave-out
master-in, or GIO
2.4.1.10 System Module Interface
Table 2-13. PGE System Module Interface
Terminal
Signal
Default
Pull Type
Description
Type
Pull State
Signal Name
144
PGE
nPORRST
46
Input
Pull Down
100uA
Power-on reset, cold reset
External power supply
monitor circuitry must
drive nPORRST low when
any of the supplies to the
microcontroller fall out of
thespecified range. This
terminal has a glitch filter.
See Section 4.8.
nRST
116
I/O
Pull Up
100uA
System reset, warm reset,
bidirectional.
The internal circuitry
indicates any reset
condition by driving nRST
low.
The external circuitry can
assert a system reset by
driving nRST low. To
ensure that an external
reset is not arbitrarily
generated, TI
recommends that an
external pull-up resistor is
connected to this terminal.
This terminal has a glitch
filter. See Section 4.8.
Copyright
© 2011, Texas Instruments Incorporated
Device Package and Terminal Functions
17
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