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ATSHA204 Datasheet(PDF) 27 Page - ATMEL Corporation |
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ATSHA204 Datasheet(HTML) 27 Page - ATMEL Corporation |
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27 / 65 page ![]() Atmel ATSHA204 [DATASHEET] 27 8740D −CRYPTO−3/12 7.3 AC Parameters – All I/O Interfaces Figure 7-1. AC Timing Diagram – All I/O Interfaces Wake Noise Suppression Data Comm t WLO t WHI t LIGNORE t HIGNORE Table 7-2. AC Parameters – All I/O Interfaces Parameter Symbol Direction Min Typ Max Unit Notes Wake Low Duration tWLO To Crypto Authentication 60 - µs SDA can be stable in either high or low levels during extended sleep intervals. Wake High Delay to Data Comm. tWHI To Crypto Authentication 2.5 ms SDA should be stable high for this entire duration. High Side Glitch Filter @ Active tHIGNORE_A To Crypto Authentication 45 (1) ns Pulses shorter than this in width will be ignored by the device, regardless of its state when active. Low Side Glitch Filter @ Active tLIGNORE_A To Crypto Authentication 45 (1) ns Pulses shorter than this in width will be ignored by the device, regardless of its state when active. High Side Glitch Filter @ Sleep tHIGNORE_S To Crypto Authentication 15 (1) µs Pulses shorter than this in width will be ignored by the device when in sleep mode. Low Side Glitch Filter @ Sleep tLIGNORE_S To Crypto Authentication 15 (1) µs Pulses shorter than this in width will be ignored by the device when in sleep mode. Watchdog Reset tWATCHDOG To Crypto Authentication 0.7 1.3 1.7 s Max. time from wake until device is forced into sleep mode (See Section 8.1.6). Note: 1. These parameters are guaranteed through characterization, but not tested. |
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