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ATSHA204 Datasheet(PDF) 36 Page - ATMEL Corporation

Part # ATSHA204
Description  Atmel CryptoAuthentication
PDF  65 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATSHA204 Datasheet(HTML) 36 Page - ATMEL Corporation

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Atmel ATSHA204 [DATASHEET]
36
8740D
−CRYPTO−3/12
8.1.5
Zone Encoding
The value in Param1 controls which zone the command accesses. See Section 2.1.2.1, “Configuration Zone Locking,” to
obtain more information on what controls the “locked” and “unlocked” states for each zone. All other zone values are reserved,
and should not be used.
Table 8-8.
Zone Encoding (Param1)
Zone
Name
Param1
Value
Size
Read
Write
Config
0
512 bits,
64 bytes,
2 slots
Always available
Partially, when unlocked
Never when locked
Never encrypted
OTP
1
512 bits,
64 bytes,
2 slots
Never when unlocked. Always
when locked, except in legacy
mode. See Section 2.1.3
All writeable when unlocked using Write
When locked, write permissions depend on OTPmode
See Section 2.1.3
Data
2
4096 bits,
512 bytes,
16 slots
Never when unlocked.
Otherwise, controlled by
IsSecret and EncryptRead.
All writeable when unlocked
When locked, writes controlled by WriteConfig
8.1.6
Watchdog Failsafe
A watchdog counter starts within the device after the ATSHA204 receives a wake token. After tWATCHDOG, the device enters
sleep mode, regardless of whether some I/O transmission or command execution is in progress. There is no way to reset the
counter other than to put the device into sleep or idle mode and then wake it up again.
The watchdog timer is implemented as a failsafe mechanism so that no matter what happens on either the system side or
inside the device, including any I/O synchronization issue, power consumption will fall to the ultra-low sleep level automatically.
The device resets the values stored in the SRAM and internal status registers when it transitions to the sleep state. However, if
the device is explicitly put into the idle mode through the appropriate I/O sequence, the device retains the contents of the two
SRAM registers (TempKey and RNG seed).
Normally, all command sequences must complete within tWATCHDOG if they require state that is stored in the SRAM registers.
The system software can use this idle mode mechanism to implement a longer command sequence than can be completed
during a single watchdog interval.



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