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WM8351 Datasheet(PDF) 209 Page - Wolfson Microelectronics plc

Part # WM8351
Description  Wolfson AudioPlus??Stereo CODEC with Power Management
PDF  330 Pages
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Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8351 Datasheet(HTML) 209 Page - Wolfson Microelectronics plc

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Production Data
WM8351
w
PD, April 2012, Rev 4.5
209
26 REGISTER MAP
26.1 OVERVIEW
The complete register map is shown below. The detailed description can be found in the relevant text of the device description. The WM8351 can be configured using the Control Interface. All registers
not listed and all unused bits should be set to '0'.
Key to characters in brackets: K = protected by key, M = default in metal mask, R = read-only, W = write-only, O = read-only in ROM configs, D = protected by key in development mode, read-only
otherwise, n = never reset, p = reset by POR only, s = reset by state machine, sd = reset by state machine except in dev mode, u = reset on UVLO, m = reset on /MEMRST
REG
NAME
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DEFAULT
R0 (0h)
Reset/ID
SW_RESET/CHIP_ID[15:0] (n)
6143h
R1 (1h)
ID
CHIP_REV[3:0]
CONF_STS[1:0]
0
0
CUST_ID[7:0]
0000h
R2 (2h)
Revision
0
0
0
0
0
0
0
0
MASK_REV[7:0]
0001h
R3 (3h)
System Control 1
CHIP_ON
(Ms)
SYS_RST
(KMs)
POWERCY
CLE
VCC_FAUL
T_OV (Ms)
RSTB_TO[1:0] (M)
BG_SLEEP
(M)
0
WDOG_DE
BUG (K)
CHIP_RES
ET_ENA (s)
MEM_VALI
D (m)
CHIP_SET_
UP
ON_DEB_T
(K)
0
ON_POL
(KMs)
IRQ_POL
(Ms)
1C02h
R4 (4h)
System Control 2
USB_SUSP
END_8MA
(M)
USB_SUSP
END (M)
USB_MSTR
(Ms)
USB_MSTR
_SRC (Ms)
USB_MSTR
_500MA
(Ms)
USB_NOLI
M
USB_SLV_5
00MA (Ms)
0
WDOG_HIB
_MODE
0
WDOG_MODE[1:0] (KMs)
0
WDOG_TO[2:0] (K)
0004h
0204h
0214h
0204h
R5 (5h)
System Hibernate
HIBERNAT
E (Ms)
0
0
0
0
0
0
0
WDOG_HIB
_MODE
HIB_START
UP_SEQ
REG_RESE
T_HIB_MO
DE
RST_HIB_
MODE
IRQ_HIB_M
ODE
MEMRST_
HIB_MODE
PCCOMP_
HIB_MODE
TEMPMON
_HIB_MOD
E
0000h
R6 (6h)
Interface Control
USE_DEV_
PINS (s)
DEV_ADDR[1:0] (s)
CONFIG_D
ONE (s)
RECONFIG
_AT_ON
0
AUTOINC
(s)
0
0
0
0
0
SPI_CFG
(KM)
SPI_4WIRE
(KM)
SPI_3WIRE
(KM)
0
8A00h
R8 (8h)
Power mgmt (1)
CODEC_ISEL[1:0]
VBUF_ENA
0
0
OUTPUT_D
RAIN_ENA
0
MIC_DET_
ENA
0
0
BIAS_ENA MICB_ENA
0
VMID_ENA
VMID[1:0]
8000h
R9 (9h)
Power mgmt (2)
0
0
0
0
IN3R_ENA IN3L_ENA
INR_ENA
INL_ENA MIXINR_EN
A
MIXINL_EN
A
OUT4_ENA OUT3_ENA
0
0
MIXOUTR_
ENA
MIXOUTL_
ENA
0000h
R10 (Ah) Power mgmt (3)
0
0
0
0
0
0
0
0
IN3R_TO_O
UT2R
0
0
0
OUT2R_EN
A
OUT2L_EN
A
OUT1R_EN
A
OUT1L_EN
A
0000h
R11 (Bh) Power mgmt (4)
0
SYSCLK_E
NA
ADC_HPF_
ENA
0
FLL_ENA
FLL_OSC_
ENA
0
TOCLK_EN
A
0
0
DACR_ENA DACL_ENA ADCR_ENA ADCL_ENA
0
0
2000h
R12 (Ch) Power mgmt (5)
0
0
0
CODEC_EN
A (s)
RTC_TICK_
ENA (KMs)
OSC32K_E
NA (KMs)
CHG_ENA
(KMs)
SW_VRTC_
ENA (s)
AUXADC_E
NA (s)
0
0
0
DCMP4_EN
A (s)
DCMP3_EN
A (s)
DCMP2_EN
A (s)
DCMP1_EN
A (s)
0E00h
R13 (Dh) Power mgmt (6)
LS_ENA
(Ms)
0
0
0
LDO4_ENA
(Ms)
LDO3_ENA
(Ms)
LDO2_ENA
(Ms)
LDO1_ENA
(Ms)
0
0
0
0
DC4_ENA
(Ms)
DC3_ENA
(Ms)
DC2_ENA
(Ms)
DC1_ENA
(Ms)
0000h
R14 (Eh) Power mgmt (7)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CS1_ENA
(s)
0000h
R16 (10h) RTC Seconds/Minutes
0
RTC_MINS[6:0]
0
RTC_SECS[6:0]
0000h
R17 (11h) RTC Hours/Day
0
0
0
0
0
RTC_DAY[2:0]
0
0
RTC_HPM
RTC_HRS[4:0]
0100h



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