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ACE25C200 Datasheet(PDF) 12 Page - ACE Technology Co., LTD. |
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ACE25C200 Datasheet(HTML) 12 Page - ACE Technology Co., LTD. |
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12 / 32 page ![]() ACE25C200 2MB Serial Flash Memory VER 1.2 12 Figure 6 Write disable instruction Read status register (RDSR) (05h) The Read Status Register instructions allow the 8-bit Status Registers to be read. The instruction is entered by driving CS# low and shifting the instruction code “05h” into the DI pin on the rising edge of CLK. The status register bits are then shifted out on the DO pin at the falling edge of CLK with most significant bit (MSB) first as shown in Figure 7. The Status Register bits are shown in Figure 4 and include the WIP, WEL, BP2-BP0 and SRP bits. The Read Status Register instruction may be used at any time, even while a Program, Erase or Write Status Register cycle is in progress. This allows the WIP status bit to be checked to determine when the cycle is complete and if the device can accept another instruction. The Status Register can be read continuously. The instruction is completed by driving CS# high. Figure 7 Read status register instruction Write Status Register (WRSR) (01h) The Write Status Register (WRSR) instruction allows the Status Register to be written. Only non-volatile Status Register bits SRP, BP2, BP1, BP0 can be written to. All other Status Register bit locations are read-only and will not be affected by the Write Status Register (WRSR) instruction. The Status Register bits are shown in Figure 4, and described in 10 Status Register. |
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