ADS42LB49 datasheet(44/70 Pages) TI

44 / 70 page

ADS42JB49

ADS42JB69

SLAS900C – OCTOBER 2012 – REVISED JULY 2013

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ADDRESS

A[7:0] (Hex)

CUSTOM PATTERN 1 (7:0)

Default: 00h

D[7:0]

CUSTOM PATTERN 1 (7:0)

Sets custom pattern 1 (7:0) using these bits for both channels

ADDRESS

A[7:0] (Hex)

CUSTOM PATTERN 2 (15:8)

Default: 00h

D[7:0]

CUSTOM PATTERN 2 (15:8) Sets custom pattern 2 (15:8) using these bits for both channels

ADDRESS

A[7:0] (Hex)

CUSTOM PATTERN 2 (7:0)

Default: 00h

D[7:0]

CUSTOM PATTERN 2 (7:0)

Sets custom pattern 2 (7:0) using these bits for both channels

ADDRESS

A[7:0] (Hex)

Always write 0

FAST OVR THRESHOLD

Default: FFh

Always write 0

Default value of this bit is '1'. Always write this bit to '0' when fast OVR thresholds are programmed.

D[6:0]

FAST OVR THRESHOLD

The device has a fast OVR mode that indicates an overload condition at the ADC input. The input voltage level at which the

overload is detected is referred to as the threshold and is programmable using the FAST OVR THRESHOLD bits. FAST OVR is

triggered nine output clock cycles after the overload condition occurs. The threshold at which fast OVR is triggered is (full-scale ×

[the decimal value of the FAST OVR THRESHOLD bits] / 127). See section OVERRANGE INDICATION for details.

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ADS42LB49 Datasheet(PDF) 44 Page - Texas Instruments