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ADS42LB49 Datasheet(PDF) 12 Page - Texas Instruments

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Part # ADS42LB49
Description  Dual-Channel, 14- and 16-Bit, 250-MSPS Analog-to-Digital Converters
PDF  70 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

ADS42LB49 Datasheet(HTML) 12 Page - Texas Instruments

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ADS42JB49
ADS42JB69
SLAS900C – OCTOBER 2012 – REVISED JULY 2013
www.ti.com
PIN ASSIGNMENTS: JESD204B Output Interface
NAME
PIN NO.
I/O
FUNCTION
DESCRIPTION
12, 15, 19, 20,
AGND
23, 26, 28, 34,
I
Supply
Analog ground
37
11, 16, 18, 22,
AVDD
27, 31, 33, 38,
I
Supply
1.8-V analog power supply
40
AVDD3V
17, 32
I
Supply
3.3-V analog supply for analog buffer
CLKINM
24
I
Clock
Differential ADC clock input
CLKINP
25
I
Clock
Differential ADC clock input
CTRL1
39
I
Control
Power-down control with an internal 150-k
Ω pull-down resistor
CTRL2
10
I
Control
Power-down control with an internal 150-k
Ω pull-down resistor
DA0P/M
54, 53
O
Interface
JESD204B serial data output for channel A, lane 0
DA1P/M
52,51
O
Interface
JESD204B serial data output for channel A, lane 1
DB0P/M
56,57
O
Interface
JESD204B serial data output for channel B, lane 0
DB1P/M
58,59
O
Interface
JESD204B serial data output for channel B, lane 1
1, 3, 46, 48,
DGND
I
Supply
Digital ground
50, 63
2, 7, 47, 49,
DRVDD
I
Supply
Digital 1.8-V power supply
60, 64
INAM
35
I
Input
Differential analog input for channel A
INAP
36
I
Input
Differential analog input for channel A
INBM
14
I
Input
Differential analog input for channel B
INBP
13
I
Input
Differential analog input for channel B
IOVDD
55
I
Supply
Digital 1.8-V power supply for the JESD204B transmitter
MODE
4
I
Control
Connect to GND
OVRA
61
O
Interface
Overrange indication channel A in CMOS output format.
OVRB
62
O
Interface
Overrange indication channel B in CMOS output format.
PDN_GBL
6
I
Control
Global power down. Active high with an internal 150-k
Ω pull-down resistor.
RESET
44
I
Control
Hardware reset; active high. This pin has an internal 150-k
Ω pull-down resistor.
SCLK
43
I
Control
Serial interface clock input. This pin has an internal 150-k
Ω pull-down resistor.
SDATA
42
I
Control
Serial interface data input. This pin has an internal 150-k
Ω pull-down resistor.
SDOUT
45
O
Control
Serial interface data output
SEN
41
I
Control
Serial interface enable. This pin has an internal 150-k
Ω pull-up resistor.
STBY
5
I
Control
Standby. Active high with an internal 150-k
Ω pull-down resistor.
SYNC~P
9
I
Interface
Synchronization input for JESD204B port
SYNC~M
8
I
Interface
Synchronization input for JESD204B port
SYSREFM
30
I
Clock
External SYSREF input (subclass 1)
SYSREFP
29
I
Clock
External SYSREF input (subclass 1)
VCM
21
O
Output
1.9-V common-mode output voltage for analog inputs
Thermal Pad
65
GND
Ground
Connect to ground plane
12
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Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links: ADS42JB49 ADS42JB69



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