TAS5508 datasheet(5/105 Pages) TI

5 / 105 page

TAS5508

8-Channel Digital Audio PWM Processor

www.ti.com

SLES091D – FEBRUARY 2004 – REVISED JULY 2009

List of Figures

1-1

TAS5508 Functional Structure

.................................................................................................. 11

1-2

Typical TAS5508 Application (DVD Receiver)

................................................................................ 12

1-3

Recommended TAS5508 and TAS5121 Channel Configuraton

............................................................ 13

2-1

TAS5508 DAP Architecture With I

2C Registers (Fs

≤ 96 kHz).............................................................. 22

2-2

TAS5508 Architecture With I

2C Registers (Fs = 176.4 kHz or Fs = 192 kHz)

............................................ 23

2-3

TAS5508 Detailed Channel Processing

........................................................................................ 24

2-4

5.23 Format

........................................................................................................................ 25

2-5

Conversion Weighting Factors—5.23 Format to Floating Point

............................................................. 25

2-6

Alignment of 5.23 Coefficient in 32-Bit I

2C Word

............................................................................. 25

2-7

25.23 Format

...................................................................................................................... 26

2-8

Alignment of 5.23 Coefficient in 32-Bit I

2C Word

............................................................................. 26

2-9

Alignment of 25.23 Coefficient in Two 32-Bit I

2C Words

..................................................................... 27

2-10

TAS5508 Digital Audio Processing

............................................................................................. 28

2-11

Input Crossbar Mixer

............................................................................................................. 28

2-12

Biquad Filter Structure

............................................................................................................ 29

2-13

Automute Threshold

.............................................................................................................. 31

2-14

Loudness Compensation Functional Block Diagram

......................................................................... 32

2-15

Loudness Example Plots

......................................................................................................... 33

2-16

DRC Positioning in TAS5508 Processing Flow

............................................................................... 34

2-17

Dynamic Range Compression (DRC) Transfer Function Structure

........................................................ 35

2-18

Output Mixers

...................................................................................................................... 39

2-19

De-Emphasis Filter Characteristics

............................................................................................. 40

2-20

Power-Supply and Digital Gains (Log Space)

................................................................................. 41

2-21

Power-Supply and Digital Gains (Linear Space)

.............................................................................. 41

2-22

Block Diagrams of Typical Systems Requiring TAS5508 Automatic AM Interference-Avoidance Circuit

............. 42

4-1

Slave Mode Serial Data Interface Timing

...................................................................................... 57

4-2

SCL and SDA Timing

............................................................................................................. 58

4-3

Start and Stop Conditions Timing

............................................................................................... 58

4-4

Reset Timing

....................................................................................................................... 59

4-5

Power-Down Timing

.............................................................................................................. 59

4-6

Error Recovery Timing

........................................................................................................... 60

4-7

Mute Timing

........................................................................................................................ 60

4-8

HP_SEL Timing

................................................................................................................... 61

4-9

2S 64-Fs Format

.................................................................................................................. 62

4-10

Left-Justified 64-Fs Format

...................................................................................................... 63

4-11

Right-Justified 64-Fs Format

.................................................................................................... 64

5-1

Typical I

2C Sequence

............................................................................................................. 65

5-2

Single-Byte Write Transfer

....................................................................................................... 66

5-3

Multiple-Byte Write Transfer

..................................................................................................... 66

List of Figures

TAS5508 Datasheet(PDF) 5 Page - Texas Instruments

TAS5508 Datasheet(HTML) 5 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL