TAS5508 datasheet(73/105 Pages) TI

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Serial-Control Interface Register Definitions

7.1

Clock Control Register (0x00)

7.2

General Status Register 0 (0x01)

TAS5508

8-Channel Digital Audio PWM Processor

www.ti.com

SLES091D – FEBRUARY 2004 – REVISED JULY 2009

Unless otherwise noted, the I2C register default values are in bold font.

Note that u indicates unused bits.

Bit D1 is Don't Care.

Table 7-1. Clock Control Register Format

FUNCTION

–

32-kHz data rate

–

38-kHz data rate

–

44.1-kHz data rate

–

48-kHz data rate

–

88.2-kHz data rate

–

96-kHz data rate

–

176.4-kHz data rate

–

192-kHz data rate

–

MCLK frequency = 64

–

MCLK frequency = 128

–

MCLK frequency = 192

–

MCLK frequency = 256

–

MCLK frequency = 384

–

MCLK frequency = 512

–

MCLK frequency = 768

–

Reserved

–

Clock register is valid (read-only)

–

Clock register is not valid (read-only)

Table 7-2. General Status Register Format

FUNCTION

–

Clip indicator

–

Bank switching busy

–

Identification code for TAS5508

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Serial-Control Interface Register Definitions

TAS5508 Datasheet(PDF) 73 Page - Texas Instruments

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