TAS5508 datasheet(18/105 Pages) TI

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2.2

TAS5508 Functional Description

2.2.1

Power Supply

2.2.2

Clock, PLL, and Serial Data Interface

2.2.2.1 Serial Audio Interface

TAS5508

8-Channel Digital Audio PWM Processor

SLES091D – FEBRUARY 2004 – REVISED JULY 2009

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Figure 2-1 shows the TAS5508 functional structure. The following sections describe the TAS5508

functional blocks:

• Power supply

• Clock, PLL, and serial data interface

• I2C serial-control interface

• Device control

• Digital audio processor (DAP)

The power-supply section contains supply regulators that provide analog and digital regulated power for

various sections of the TAS5508. The analog supply supports the analog PLL, whereas digital supplies

support the digital PLL, the digital audio processor (DAP), the pulse-width modulator (PWM), and the

output control (reclocker). The regulators can also be turned off when terminals RESET and PDN are both

low.

The TAS5508 is a clocked slave-only device that requires the use of an external 13.5-MHz crystal. It

accepts MCLK, SCLK, and LRCLK as inputs only.

The TAS5508 uses the external crystal to provide a time base for:

• Continuous data and clock error detection and management

• Automatic data-rate detection and configuration

• Automatic MCLK-rate detection and configuration (automatic bank switching)

• Supporting I2C operation/communication while MCLK is absent

The TAS5508 automatically handles clock errors, data-rate changes, and master-clock frequency

changes without requiring intervention from an external system controller. This feature significantly

reduces system complexity and design.

The TAS5508 operates as a slave-only/receive-only serial data interface in all modes. The TAS5508 has

four PCM serial data interfaces to permit eight channels of digital data to be received though the SDIN1,

SDIN2, SDIN3, and SDIN4 inputs. The serial audio data is in MSB-first, 2s-complement format.

The serial data input interface of the TAS5508 can be configured in right-justified, I2S, or left-justified

modes. The serial data interface format is specified using the I2C data-interface control register. The

supported formats and word lengths are shown in Table 2-1.

Description

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