28F008B3 datasheet(16/49 Pages) INTEL

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SMART 3 ADVANCED BOOT BLOCK–BYTE-WIDE

PRELIMINARY

reached using the commands summarized in Table

4. A comprehensive chart showing the state

transitions is in Appendix B.

3.2.1

READ ARRAY

When RP# transitions from VIL (reset) to VIH, the

device will be in the read array mode and will

respond to the read control inputs (CE#, address

inputs, and OE#) without any commands being

written to the CUI.

When the device is in the read array mode, four

control signals must be controlled to obtain data at

the outputs.

• WE# must be logic high (VIH)

• CE# must be logic low (VIL)

• OE# must be logic low (VIL)

• RP# must be logic high (VIH)

In addition, the address of the desired location must

be applied to the address pins.

If the device is not in read array mode, as would be

the case after a program or erase operation, the

Read Array command (FFH) must be written to the

CUI before array reads can take place.

Table 4. Command Codes and Descriptions

Code

Device Mode

Description

Invalid/

Reserved

Unassigned commands that should not be used. Intel reserves the right to

redefine these codes for future functions.

Read Array

Places the device in read array mode, such that array data will be output on the

data pins.

Program

Set-Up

This is a two-cycle command. The first cycle prepares the CUI for a program

operation. The second cycle latches addresses and data information and

initiates the WSM to execute the Program algorithm. The flash outputs status

after programming to read array data. See Section 3.2.4.

Alternate

Program Set-Up

(See 40H/Program Set-Up)

Erase

Set-Up

Prepares the CUI for the Erase Confirm command. If the next command is not

an Erase Confirm command, then the CUI will (a) set both SR.4 and SR.5 of the

status register to a “1,” (b) place the device into the read status register mode,

and (c) wait for another command. See Section 3.2.5.

Program

Resume

Erase Resume/

Erase Confirm

If the previous command was an Erase Set-Up command, then the CUI will

close the address and data latches, and begin erasing the block indicated on the

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