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28F008B3 Datasheet(PDF) 41 Page - Intel Corporation

Part # 28F008B3
Description  SMART 3 ADVANCED BOOT BLOCK BYTE-WIDE
PDF  49 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

28F008B3 Datasheet(HTML) 41 Page - Intel Corporation

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E
SMART 3 ADVANCED BOOT BLOCK–BYTE-WIDE
41
PRELIMINARY
Table 16. AC Characteristics: Write Operations (Extended Temperature)1
Load
50 pF
#
Symbol
Parameter
VCC
2.7V–3.6V5
2.7V-3.6V5
Units
Prod
120 ns
150 ns
Notes
Min
Max
Min
Max
W1
tPHWL
tPHEL
RP# High Recovery to
WE# (CE#) Going Low
600
600
ns
W2
tELWL
tWLEL
CE# (WE#) Setup to
WE# (CE#) Going Low
00
ns
W3
tWLWH
tELEH
WE# (CE#) Pulse Width
90
90
ns
W4
tDVWH
tDVEH
Data Setup to WE#
(CE#) Going High
370
70
ns
W5
tAVWH
tAVEH
Address Setup to WE#
(CE#) Going High
290
90
ns
W6
tWHEH
tEHWH
CE# (WE#) Hold Time
from WE# (CE#) High
00
ns
W7
tWHDX
tEHDX
Data Hold Time from
WE# (CE#) High
30
0
ns
W8
tWHAX
tEHAX
Address Hold Time from
WE# (CE#) High
20
0
ns
W9
tWHWL
tEHEL
WE# (CE#) Pulse Width
High
30
30
ns
W10
tVPWH
tVPEH
VPP Setup to WE# (CE#)
Going High
4
200
200
ns
W11
tQVVL
VPP Hold from Valid SRD
4
0
0
ns
tLOCK
Block Unlock / Lock
Delay
4, 6
200
200
ns
NOTES:
1.
Read timing characteristics during program suspend and erase suspend are the same as during read-only operations.
Refer to AC Characteristics during read mode.
2.
Refer to command definition table for valid A
IN (Table6).
3.
Refer to command definition table for valid D
IN (Table 6).
4.
Sampled, but not 100% tested.
5.
See Test Configuration (Figure 11 and 13), 2.7V–3.6V and 1.8V–2.2V Standard Test component values.
6.
Time tLOCK is required for successful locking and unlocking of all lockable blocks.



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