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28F008B3 Datasheet(PDF) 32 Page - Intel Corporation |
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28F008B3 Datasheet(HTML) 32 Page - Intel Corporation |
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32 / 49 page ![]() SMART 3 ADVANCED BOOT BLOCK–BYTE-WIDE E 32 PRELIMINARY Table 10. DC Characteristics (Continued) Sym Parameter Notes VCC = 2.7V–3.6V Unit Test Conditions Min Max VIL Input Low Voltage –0.4 0.4 V VIH Input High Voltage VCCQ – 0.4V V VOL Output Low Voltage 0.10 V VCC = VCCMin = VCCQMin IOL = 100 µA VOH Output High Voltage VCCQ – 0.1V VVCC = VCCMin = VCCQMin IOH = –100 µA VPPLK VPP Lock-Out Voltage 3 1.5 V Complete Write Protection VPPH1 VPP during Prog/Erase Operations 3 2.7 3.6 V VPPH2 3,6 11.4 12.6 V VLKO VCC Program/Erase Lock Voltage 1.5 V VLKO2 VCCQ Program/Erase Lock Voltage 1.2 V NOTES: 1. All currents are in RMS unless otherwise noted. Typical values at nominal VCC, TA = +25°C. 2. ICCES and ICCWS are specified with device de-selected. If device is read while in erase suspend, current draw is ICCR. If the device is read while in program suspend, current draw is ICCR. 3. Erase and Program are inhibited when VPP < VPPLK and not guaranteed outside the valid VPP ranges of VPPH1 and VPPH2. 4. Sampled, not 100% tested. 5. Automatic Power Savings (APS) reduces ICCR to approximately standby levels in static operation (CMOS inputs). 6. Applying VPP = 11.4V–12.6V during program/erase can only be done for a maximum of 1000 cycles on the main blocks and 2500 cycles on the parameter blocks. VPP may be connected to 12V for a total of 80 hours maximum. See Section 3.4 for details. 7. Includes the sum of VCC and VCCQ current. Table 11. Capacitance (TA = 25°C, f = 1 MHz) Sym Parameter Notes Typ Max Units Conditions CIN Input Capacitance 1 6 8 pF VIN = 0V COUT Output Capacitance 1 10 12 pF VOUT = 0V NOTE: 1. Sampled, not 100% tested. |
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