AN3165

Integration principles and description

Doc ID 17180 Rev 1

19/31

The data in Table 4 suggests maintaining the PFC firmware sampling strategy and adding

the sub-motor voltage bus conversion in the first group in place of the dummy value. It is

necessary to specify when the firmware of the MC part has to use these values.

Figure 11.

Voltage management timing in STM32 dual FOC MC

As shown in Figure 11, with the dual MC firmware the TIM1_UP event triggers the starts for

ADC1 and ADC2. At the end of the conversion, the related ADC1_2_IRQ routine processes

the acquired bus voltages of the main and sub motor stages.

In the integrated firmware, since the two bus voltages are already converted by the firmware

of the PFC part, they have to be passed to the MC part at the correct moment, like the dual

MC firmware has done, that is, immediately after the TIM1 update event.

To replicate this behavior, an auxiliary timer (TIM4) is used that processes the bus voltages

after the TIM1_UP event. In practice, the code executed in the ADC1_2 IRQ routine in the

dual FOC MC part is now executed inside the TIM4_IRQ routine.

Table 4.

Use of A/D converters by both firmware sets

Control loop

frequency

Digital PFC

Dual FOC MC

40 kHz

6 kHz

Regular conversions

Injected conversions

Every conversion

ADC1

VDC

IAC

ADC2

Dummy

VAC