AN3165

Integration principles and description

Doc ID 17180 Rev 1

23/31

Below is the code for synchronizing TIM4 with TIM1.

In the "pfc.c" module:

void TIM4_Configuration(void)

{

...

/* Selects TIM1 Output Trigger as input trigger for TIM4 */

TIM_SelectInputTrigger(TIM4, TIM_TS_ITR0);

/* Selects the Trigger Mode as Slave Mode for TIM4 */

TIM_SelectSlaveMode(TIM4, TIM_SlaveMode_Trigger);

}

As such, the code executed in the ADC1_2 IRQ routine in the dual FOC MC part is now

executed inside the TIM4_IRQ routine.

In the "stm32f10x_it.c" module:

void ADC1_2_IRQHandler(void)

{

...

#ifndef PFC_ENABLE

if((ADC1->SR & ADC_FLAG_JEOC) == ADC_FLAG_JEOC) // Test if ADC3

JEOC is set

{

//It clear JEOC flag

ADC1->SR = ~(u32)ADC_FLAG_JEOC;

SVPWMGetBusSampling();

}

else

#endif

...

}

void TIM4_IRQHandler(void)

{

...

SVPWMGetBusSampling();

...

}

4.3.2

Firmware modifications to resolve conflicts between I/O pins

The following is the code to resolve the conflicts outlined in Section 4.2.3, and demonstrates

how TIM5_CC3 replaces the function of TIM8_CH4 of the dual FOC MC part.

In the "pfc.c" module:

void TIM5_Configuration(void)

{

...

/* Selects TIM5 Output Trigger as OC3REF */

TIM_SelectOutputTrigger(TIM5, TIM_TRGOSource_OC3Ref);

/* Selects TIM2 Output Trigger as input trigger fot TIM5 */