AN3165

Integration principles and description

Doc ID 17180 Rev 1

27/31

Figure 14.

Connection topology for integration of dual FOC MC and digital PFC

The regulated output DC voltage of the PFC is the input voltage for both 3-ph inverter

boards. For this reason, Vdc has to be fixed to 350 V to be compliant with the input stage of

the 3-ph inverter boards. This Vdc value forces Vac to be within the range [185÷230 Vrms]

so as to obtain a good PF.

Figure 15

is a screenshot of the system when it is running. It shows:

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the bus voltage Vdc controlled by the PFC part.

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the input current Iac.

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the main motor’s phase current.

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the sub motor’s phase current.

Figure 15.

System running