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UPD178016 Datasheet(PDF) 40 Page - NEC

Part # UPD178016
Description  8-BIT SINGLE-CHIP MICROCONTROLLER
PDF  56 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

UPD178016 Datasheet(HTML) 40 Page - NEC

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µPD178004, 178006, 178016, 178018
(iii) 3-wire serial I/O mode with automatic transmit/receive function (SCK1 ... internal clock
output)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
SCK1 cycle time
tKCY11
4.5 V
≤ VDD ≤ 5.5 V
800
ns
3.5 V
≤ VDD < 4.5 V
1600
ns
SCK1 high/low-level width
tKH11,
4.5 V
≤ VDD ≤ 5.5 V
tKCY11/2 – 50
ns
tKL11
3.5 V
≤ VDD < 4.5 V
tKCY11/2 – 100
ns
SI1 setup time (to SCK1
↑)tSIK11
4.5 V
≤ VDD ≤ 5.5 V
100
ns
3.5 V
≤ VDD < 4.5 V
150
ns
SI1 hold time (from SCK1
↑)tKSI11
400
ns
SO1 output delay time (from SCK1
↓)tKSO11
C = 100 pFNote
300
ns
STB
↑ from SCK1↑
tSBD
tKCY11/2 – 100
tKCY11/2 + 100
ns
Strobe signal high-level width
tSBW
tKCY11/ – 30
tKCY11 + 30
ns
Busy signal setup time
tBYS
100
ns
(to busy signal detection timing)
Busy signal hold time
tBYH
4.5 V
≤ VDD ≤ 5.5 V
100
ns
(from busy signal detection timing)
3.5 V
≤ VDD < 4.5 V
150
ns
SCK1
↓ from busy inactive
tSPS
2tKCY11
ns
Note
C is the load capacitance of SO1 output line.
(iv) 3-wire serial I/O mode with automatic transmit/receive function (SCK1 ... external clock
input)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
SCK1 cycle time
tKCY12
4.5 V
≤ VDD ≤ 5.5 V
800
ns
3.5 V
≤ VDD < 4.5 V
1600
ns
SCK1 high/low-level width
tKH12,
4.5 V
≤ VDD ≤ 5.5 V
400
ns
tKL12
3.5 V
≤ VDD < 4.5 V
800
ns
SI1 setup time (to SCK1
↑)tSIK12
100
ns
SI1 hold time (from SCK1
↑)tKSI12
400
ns
SO1 output delay time (from SCK1
↓)tKSO12
C = 100 pFNote
300
ns
SCK1 at rising or falling edge time tR12, tF12
1000
ns
Note
C is the load capacitance of SO1 output line.



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