F20 datasheet(65/111 Pages) ETC2

65 / 111 page

Boxchip F20 Datasheet

Ver 1.01

Page 65

12.

NAND Flash Controller

12.1.

NFC Overview

The NFC is one NAND Flash Controller which supports all NAND/MLC flash memory

available in the market. New type flash can be supported by software re-configuration. The

NFC can support 8 NAND flash with 1.8/3.3 V voltage supply. There are 8 separate chip

select lines (CE#) for connecting up to 8 flash chips with2 R/B signals.

The On-the-fly error correction code (ECC) is built-in NFC for enhancing reliability.

BCH-16/-24/-28/-32 is implemented and it can detect and correct up to 64 bits error per 512

or 1024 bytes data. The on chip ECC and parity checking circuitry of NFC frees CPU for

other tasks. The ECC function can be disabled by software.

The data can be transferred by DMA or by CPU memory-mapped IO method. The NFC

provides automatic timing control for reading or writing external Flash. The NFC maintains

the proper relativity for CLE, CE# and ALE control signal lines. Three kinds of modes are

supported for serial read access. The conventional serial access is mode 0 and mode 1 is for

EDO type and mode 2 for extension EDO type. NFC can monitor the status of R/B# signal

line.

Block management and wear leveling management are implemented in software.

The NAND Flash Controller (NFC) includes the following features:



Supports all SLC/MLC/TLC flash and EF-NAND memory available in the market



Software configure seed for randomize engine



Software configure method for adaptability to a variety of system and memory types



Supports 8-bit Data Bus Width



Supports 1024, 2048, 4096, 8192, 16384 bytes size per page



Supports 1.8/3.3 V voltage supply Flash



Up to 8 flash chips which are controlled by NFC_CEx#



Supports Conventional and EDO serial access method for serial reading Flash



On-the-fly BCH error correction code which correcting up to 64 bits per 512 or 1024

bytes



Corrected Error bits number information report



ECC automatic disable function for all 0xff data



NFC status information is reported by its’ registers and interrupt is supported



One Command FIFO



External DMA is supported for transferring data



Two 256x32-bit RAM for Pipeline Procession



Support self –debug for NFC debug

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