F20 datasheet(72/111 Pages) ETC2

72 / 111 page

Boxchip F20 Datasheet

Ver 1.01

Page 72

17.

SPI Interface

17.1.

SPI Description

The SPI is the Serial Peripheral Interface which allows rapid data communication with less

software interrupts. The SPI module contains one 64x8 receiver buffer (RXFIFO) and one

64x8 transmit buffer (TXFIFO). It can work at two modes: Master mode and Slave mode. It

includes the following features:



Full-duplex synchronous serial interface



Master/Slave configurable



Four chip selects to support multiple peripherals for SPI0 and SPI1 has one chip select



8-bit wide by 64-entry FIFO for both transmit and receive data



Polarity and phase of the Chip Select (SPI_SS) and SPI Clock (SPI_SCLK) are

configurable



DMA support

17.2.

SPI Controller Signal Description

Table 17-1. SPI Controller Signal Description

Signal

Name

Description

Type

Name

Ball#

Serial Port Interface(SPI0)

SPI0_CS0

SPI0 Chip Select

I/O

PC23

SPI0_MOSI

SPI0 Master data Out, Slave data In

I/O

PC0

SPI0_MISO

SPI0 Master data In, Slave data Out

I/O

PC1

SPI0_CLK

SPI0 Clock

I/O

PC2

Serial Port Interface(SPI1)

SPI1_CS0

SPI1 Chip Select 0

I/O

PI8

PA0

SPI1_CS1

SPI1 Chip Select 1

PI9

SPI1_CLK

SPI1 Master data Out, Slave data In

I/O

PI10

PA1

SPI1_MOSI

SPI1 Master data In, Slave data Out

I/O

PI11

PA2

SPI1_MISO

SPI1 Clock

I/O

PI12

PA3

Serial Port Interface(SPI2)

SPI2_CS0

SPI2 Chip Select 0

I/O

PB14

PC19

P11

C10

SPI2_CS1

SPI2 Chip Select 1

PB13

Y10

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