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F20 Datasheet(PDF) 80 Page - List of Unclassifed Manufacturers |
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F20 Datasheet(HTML) 80 Page - List of Unclassifed Manufacturers |
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80 / 111 page ![]() Boxchip F20 Datasheet Boxchip. All rights reserved. Ver 1.01 Page 80 Supports High-Bandwidth Isochronous & Interrupt transfers Automated splitting/combining of packets for Bulk transfers Supports point-to-point and point-to-multipoint transfer in both Host and Peripheral mode Includes automatic ping capabilities Soft connect/disconnect function Performs all transaction scheduling in hardware Power Optimization and Power Management capabilities Includes interface to an external Dedicated Central DMA controller; data is transferred through Special bus for saving ABH bus bandwidth Supports industry-standard Single Port SRAM for USB Configurable Data FIFO; The size is 2112 byte with 32-bit word width; The RAM can be used by other modules when USB/OTG disable 21.2. USB Controller Signal Description Table 21-1. USB Controller Signal Description Signal Name Description Type Pin Name Ball# USB0 OTG 2.0 DM0 USB0 OTG Data(-) I/O DM0 U19 DP0 USB0 OTG Data(+) I/O DP0 U20 USB1 HOST 2.0 DM1 USB1 HOST Data(-) I/O DM1 R17 DP1 USB1 HOST Data(+) I/O DP1 R18 USB2 HOST 2.0 DM2 USB2 HOST Data(-) I/O DM2 T17 DP2 USB2 HOST Data(+) I/O DP2 T18 |
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