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F20 Datasheet(PDF) 67 Page - List of Unclassifed Manufacturers

Part # F20
Description  8-ch normal DMA controllers and 8-ch dedicated DMA controllers
PDF  111 Pages
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Manufacturer  ETC2 [List of Unclassifed Manufacturers]
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F20 Datasheet(HTML) 67 Page - List of Unclassifed Manufacturers

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Boxchip F20 Datasheet
Boxchip. All rights reserved.
Ver 1.01
Page 67
13.
SD2.0 Controller
13.1.
SD/MMC Overview
The SD/MMC can be configured either as a Secure Digital Multimedia Card controller, which
simultaneously supports Secure Digital memory (SD Mem), Secure Digital I/O (SDIO),
Multimedia Cards (MMC), and Consumer Electronics Advanced Transport Architecture
(CE-ATA).
The SD/MMC controller includes the following features:
Supports Secure Digital memory protocol commands
Supports Secure Digital I/O protocol commands
Supports Multimedia Card protocol commands
Supports CE-ATA digital protocol commands
Supports Command Completion signal and interrupt to host processor and Command
Completion Signal disable feature
Supports one SD or MMC (3.3 or 4.0) or CE-ATA device
Supports hardware CRC generation and error detection
Supports programmable baud rate
Supports host pull-up control
Supports SDIO interrupts in 1-bit and 4-bit modes
Supports SDIO suspend and resume operation
Supports SDIO read wait
Supports block size of 1 to 65535 bytes
Internal 16x32-bit (64 bytes total) FIFO for data transfer
DMA interface for dedicated DMA transfer
Only support 3.3 V IO pad
13.2.
SD2.0 Controller Signal Description
Table 13-1. NAND Flash Controller Signal Description
Signal
Name
Description
Type
Pin
Name
Ball#
SD1/SDIO1/MMC1(2.0)
SDC1_CLK
SD1/SDIO1/MMC1 Output Clock
O
PE13
PC5
U2
C8
SDC1_CMD
SD1/SDIO1/MMC1 Cmmand Line
I/O
PE12
PC3
U1
E8
SDC1_D0
SD1/SDIO1/MMC1 Data bit0
I/O
PE14
PC12
U3
E7
SDC1_D1
SD1/SDIO1/MMC1 Data bit1
I/O
PE15
U4



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