Electronic Components Datasheet Search
  English  ▼

X  

Z89321 Datasheet(PDF) 29 Page - Zilog, Inc.

Part # Z89321
Description  16-Bit Digital Signal Processors
PDF  40 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ZILOG [Zilog, Inc.]
Direct Link  http://www.zilog.com
Logo ZILOG - Zilog, Inc.

Z89321 Datasheet(HTML) 29 Page - Zilog, Inc.

Back Button Z89321 Datasheet HTML 25Page - Zilog, Inc. Z89321 Datasheet HTML 26Page - Zilog, Inc. Z89321 Datasheet HTML 27Page - Zilog, Inc. Z89321 Datasheet HTML 28Page - Zilog, Inc. Z89321 Datasheet HTML 29Page - Zilog, Inc. Z89321 Datasheet HTML 30Page - Zilog, Inc. Z89321 Datasheet HTML 31Page - Zilog, Inc. Z89321 Datasheet HTML 32Page - Zilog, Inc. Z89321 Datasheet HTML 33Page - Zilog, Inc. Next Button
Zoom Inzoom in Zoom Outzoom out
 29 / 40 page
background image
Z89321/371/391
Zilog
16-Bit Digital Signal Processors
DS97DSP0100
P R E L I M I N A R Y
29
1
A/D Accommodation
The CODEC interface can be used for serial A/D or serial
D/A transmission. The interface provides the necessary
control signals to adapt to many standard serial convert-
ers. The low-pass and smoothing filters are necessary for
systems with converters.
High-Speed Serial Port
The Z89321 CODEC interface can be used as a high-
speed serial port. The necessary control signals are pro-
vided for adaptation to standard processors or external pe-
ripherals. Byte, word, or 64-bit data can be transmitted at
speeds up to 10 Mbps. (Condition includes a 20 MHz os-
cillator. Data can be transferred with single-cycle instruc-
tions to an internal register file.)
8-Bit CODEC Interface
The Z89321 provides an option for a standard 8-bit CO-
DEC interface. Hardware
m-law compression is available
(expansion performed by software lookup table). The CO-
DEC interface transmits data consisting of 8-bit or com-
pounded 8-bit information. Figure 27 shows a typical sche-
matic arrangement.
The timing for this type of arrangement is presented in Fig-
ure 28. The flexible design provides adaptation for 16-bit
linear CODEC.
Figure 26. A/D, D/A Implementation Block Diagram
SCLK
Communicate
Data
Serial
Data In
CLKIN
FSO
FS1
TXD
Serial A/D
Serial
Data Out
Low-Pass
Filter
Analog
In
CLKIN
Communicate
Data
Smoothing
Filter
Analog
Out
RXD
Serial A/D
Z89321/371/391
Table 7. Tabulated Transmission Rates*
Transmission
Rate
Maximum SCLK
10 Mbps
Maximum Frame Sync
8-bit
769.2 kHz
16-bit
476.2 kHz
Stereo (64-bit)
263.2 kHz
Note: Calculations consider the interrupt access time (typically
four cycles), transfer of data, loading of new data, and latency pe-
riods between CODEC transfers. During the interrupt cycle, de-
velopers often execute additional software, affecting the
maximum transfer rate. Calculations are for single-channel trans-
fers only.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com