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Z89321 Datasheet(PDF) 5 Page - Zilog, Inc. |
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Z89321 Datasheet(HTML) 5 Page - Zilog, Inc. |
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5 / 40 page ![]() Z89321/371/391 Zilog 16-Bit Digital Signal Processors DS97DSP0100 P R E L I M I N A R Y 5 1 Table 2. Z89321/371 44-Pin PLCC Pin IdentiÞcation No. Symbol Function Direction 1 HALT Stop Execution Input 2 FS0 CODEC 0 Frame Sync Input/Output* 3 /INT0 Interrupt Input 4-5 O0-UO1 User Output Output 6 FS1 CODEC 1 frame sync Input/Output* 7VSS Ground 8-10 EXT0-EXT2 External data bus Input/Output 11 VSS Ground 12 RXD Serial input from CODECs Input 13-15 EXT12-EXT14 External data bus Input/Output 16 VSS Ground 17 EXT15 External data bus Input/Output 18-19 EXT3-EXT4 External data bus Input/Output 20 VSS Ground 21-23 EXT5-EXT7 External data bus Input/Output 24 TXD Serial output to CODECs Output 25-26 EXT8-EXT9 External data bus Input/Output 27 VSS Ground 28-29 EXT10-EXT11 External data bus Input/Output 30 /INT2 Interrupt Input 31 /INT1 Interrupt Input 32 UI1 User input Input 33 UI0 User input Input 34 SCLK CODEC serial clock Input/Output* 35 VDD Power supply Input 36 RD//WR RD//WR strobe for EXT bus Output 37 WAIT WAIT state Input 38 /RESET Reset Input 39-41 EA0-EA2 External Address bus Output 42 VDD Power Supply Input 43 /DS Data strobe for external bus Output 44 CLK Clock Input Note: * Input or output is defined by interface mode selection. |
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