| Electronic Components Datasheet Search |
|
BC3770 Datasheet(PDF) 19 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
BC3770 Datasheet(HTML) 19 Page - Freescale Semiconductor, Inc |
|
19 / 45 page ![]() Analog Integrated Circuit Device Data 19 Freescale Semiconductor BC3770 5.3.9 Safety Timer There are three safety timers on the device: a pre-charge timer, a fast charge timer, and a top-off timer. The pre-charge is fixed at 45 minutes, and the fast charge and the top-off timer are programmable over I2C. The reset conditions for each timer are described with the following. 1. Pre-charge timer is reset in one or more of the following ways: • BATREG crosses over the VSYS minimum threshold of 3.6 V • Falling VBUS UVLO detected • CHGENB = HIGH 2. Fast-charge timer is reset in one or more of the following ways: • BATREG hits the regulation voltage VBAT_REG and the charge current hits the top-off current threshold • Falling VBUS UVLO detected • CHGENB=HIGH or CHGEN reset to “0” before expiration 3. Top-off timer is reset in one or more of the following ways: • BATREG hits the regulation voltage VBAT_REG, the charge current hits the top-off current threshold, and the timer expires in AUTOSTOP = 1 • Falling VBUS UVLO detected • CHGENB = HIGH or CHGEN reset to “0” before expiration However, all safety timers are reset commonly in the following fault conditions: • BAT OVP detected • VBUS OVP detected • Thermal shutdown If all fault conditions are released, the timer resumes to start. 5.3.10 VSYS When being charged from VBUS, if the battery voltage becomes close to the minimum system voltage threshold, VVSYS_MIN (3.6 V), VSYS tracks the battery voltage up to a preset VBAT_REG. A load current from an input is provided to both VSYS and the battery with up to a maximum input limit programmed value. The device regulates the system supply voltage, VSYS (3.6 V), in Trickle and Pre-charge mode, which allow the application system to be booted up even in dead or deeply discharged battery. The device has the system output, VSYS, priority over charge current, which gives the required load for the system while reducing the charge current, if the input current is limited. System path also allows accurate charge cycle since it allows the system to know precisely when the charging current has hit the current termination threshold vs. implementations, where the battery and the system are connected to the same node. When the battery voltage crosses the minimum system voltage threshold, VVSYS_MIN, the VSYS tracks the battery voltage with an appropriate voltage differential by RDS_ONQ4 x charge current. This insures the minimum power dissipation on the device comes true. When the battery charging is completed, the system node, VSYS, is regulated to VBAT_REG + RDS_ON x charge current (if available). If the charge current becomes truly 0 mA, the VSYS is technically equal to the battery voltage. Figure 7. VSYS Tracking BATTEG BATREG and VSYS VBATREG VSYS_MIN 3.6V VSYS VBAT IFAST_CHG x RDS_ON |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |