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AD7768 Datasheet(PDF) 97 Page - Analog Devices |
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AD7768 Datasheet(HTML) 97 Page - Analog Devices |
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97 / 99 page  Data Sheet AD7768/AD7768-4 Rev. A | Page 97 of 99 Bits Bit Name Settings Description Reset Access 4 CH2_RX Channel 2 0x0 RW 0 Not in use 1 Receive 1 CH1_RX Channel 1 0x0 RW 0 Not in use 1 Receive 0 CH0_RX Channel 0 0x0 RW 0 Not in use 1 Receive ADC DIAGNOSTIC CONTROL REGISTER Address: 0x57, Reset: 0x00, Name: Diagnostic Mux Control The AD7768-4 ADC diagnostic allows the user to select a zero-scale, positive full-scale, or negative full-scale input to the ADC, which can be converted to verify the correct operation of the ADC channel. This register controls the voltage that is applied to each of the ADC channels for the diagnostic. There are three input voltage options that the user can select. The voltage selected is mapped to the channels based on which mode (Mode A or Mode B) they belong to, which is set according to the channel mode select register (Register 0x03). Set Bits[7:0] to 1 in the ADC diagnostic receive select register, then select the voltage check desired for the channels on Mode A and the channels on Mode B through Bits[2:0] and Bits[6:4], respectively. Table 86. Bit Descriptions for Diagnostic Mux Control Bits Bit Name Settings Description Reset Access [6:4] GRPB_SEL Mux B. 0x0 RW 000 Off. 011 Positive full-scale ADC check. A voltage close to positive full scale is applied internally to the ADC channel. 100 Negative full-scale ADC check. A voltage close to negative (or minus) full scale is applied internally to the ADC channel. 101 Zero-scale ADC check. A voltage close to 0 V is applied internally to the ADC channel. [2:0] GRPA_SEL Mux A. 0x0 RW 000 Off. 011 Positive full-scale ADC check. A voltage close to positive full scale is applied internally to the ADC channel. 100 Negative full-scale ADC check. A voltage close to negative (or minus) full scale is applied internally to the ADC channel. 101 Zero-scale ADC check. A voltage close to 0 V is applied internally to the ADC channel. MODULATOR DELAY CONTROL REGISTER Address: 0x58, Reset: 0x02, Name: Modulator Delay Control Table 87. Bit Descriptions for Modulator Delay Control Bits Bit Name Settings Description Reset Access [3:2] CLK_MOD_DEL_EN Enable delayed modulator clock. 0x0 RW 00 Disabled delayed clock for all channels. 01 Enable delayed clock for Channel 0 and Channel 1 only on the AD7768-4. 10 Enable delayed clock for Channel 2 and Channel 3 only on the AD7768-4. 11 Enable delayed clock for all channels. [1:0] Reserved 10 Not a user option. Must be set to 0x2. 0x2 RW |
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