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WM8993 Datasheet(PDF) 200 Page - Wolfson Microelectronics plc |
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WM8993 Datasheet(HTML) 200 Page - Wolfson Microelectronics plc |
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200 / 229 page ![]() WM8993 Production Data w PD, November 2010, Rev 4.0 200 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 0100 = 384 0101 = 512 0110 = 768 0111 = 1024 1000 = 1408 1001 = 1536 0 CLK_DSP_EN A 1 CLK_DSP enable 0 = disabled 1 = enabled Register 41h Clocking 3 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R66 (42h) Clocking 4 9 DAC_DIV4 1 DAC Divide-by-4 select 0 = DAC_DIV 1 = DAC_DIV / 4 Note - this field is ignored and invalid in Automatic Clocking Configuration mode. 6:1 CLK_256K_DI V [5:0] 10_1111 256kHz Clock Divider 0d = CLK_SYS 1d = CLK_SYS / 2 2d = CLK_SYS / 3 …. 63d = CLK_SYS / 64 Note - this field is ignored and invalid in Automatic Clocking Configuration mode. 0 SR_MODE 1 Selects Clocking Configuration mode 0 = Automatic 1 = Manual Register 42h Clocking 4 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R69 (45h) Bus Control 1 1 CLK_SYS_EN A 1 CLK_SYS enable 0 = disabled 1 = enabled Register 45h Bus Control 1 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R70 (46h) Write Sequencer 0 8 WSEQ_ENA 0 Write Sequencer Enable. 0 = Disabled 1 = Enabled 4:0 WSEQ_WRITE _INDEX [4:0] 0_0000 Sequence Write Index. This is the memory location to which any updates to R71 and R72 will be copied. 0 to 31 = RAM addresses Register 46h Write Sequencer 0 |
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