LM3421 datasheet(17/72 Pages) TI1

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RSNS

ILED

RHSP

RHSN

HSN

HSP

High-Side

Sense Amplifier

CSH

1.24V

CCMP

RCSH

COMP

Error Amplifier

VSNS

To PWM

Comparator

LM3421/23

CFS

RFS

sets öP3

sets öP2

FREQUENCY (Hz)

100

-20

-40

-60

135

-45

-90

-135

-180

-225

1e-1

1e1

1e3

1e5

1e7

0°Phase Margin

öP1

PHASE

GAIN

öZ1

D x

LM3421, LM3421-Q1, LM3423, LM3423-Q1

www.ti.com

SNVS574F – JULY 2008 – REVISED JULY 2015

Feature Description (continued)

And the right half plane zero (

ωZ1) is:

(15)

Figure 17. Uncompensated Loop Gain Frequency Response

Figure 17 shows the uncompensated loop gain in a worst-case scenario when the RHP zero is below the output

pole. This occurs at high duty cycles when the regulator is trying to boost the output voltage significantly. The

RHP zero adds 20dB/decade of gain while losing 45°/decade of phase, which places the crossover frequency

(when the gain is zero dB) extremely high because the gain only starts falling again due to the high-frequency

pole (not shown in Figure 17). The phase will be below –180° at the crossover frequency, which means there is

no phase margin (180° + phase at crossover frequency) causing system instability. Even if the output pole is

below the RHP zero, the phase will still reach –180° before the crossover frequency in most cases yielding

instability.

Figure 18. Compensation Circuitry

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LM3421 Datasheet(PDF) 17 Page - Texas Instruments

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